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JULY 14th, 2005
eASIC and Fastrack to Offer NRE-Less ASIC
eASIC Corporation has entered into a strategic partnership with Fastrack Design to eliminate
non-recurring engineering (NRE) costs as part of the ASIC design and manufacturing cost structure. As part of the Design Services
Representative (DSR) agreement with Fastrack, a turnkey design services company, the two companies plan to reduce the design
time for Structured ASICs and to eliminate the NRE fee. According to Salah Werfelli, eASIC Executive Vice President of Strategic
Business Worldwide, "Combining our award-winning configurable logic products with Fastrak's design expertise and ASIC know-how,
we deliver the industry's only NRE-free ASIC solution with complementing design services to a broader customer base. eASIC's
DSR program is aimed at establishing an extensive sales channel for our innovative programmable ASIC products to help customers
reduce costs, improve their time-to-market, and increase their overall competitiveness."
Moazzem Hossain, Fastrack President and CEO also commented on the
no NRE approach, "We are very excited about eASIC's unique programmable ASIC product line and are pleased to be part of the
DSR program. This partnership expands our service capability and provides us with a strategic weapon to compete for ASIC design
wins. Our customers are eager to have such low-cost, no NRE ASICs, which can be rapidly shipped in any volume. We intend to
aggressively pursue and support eASIC's Structured ASIC device family."
JULY 6th, 2005
ChipX has announced the CX6000 family of structured ASICs. Based
on a eight metal 0.13 micron technology, the family has been designed to expedite the development of USB based systems. In
order to accomplish that, the ASICs are available with a complete connected USB IP subsystem. According to Elie Massabki,
Vice President of Marketing at ChipX, "Normally, designers seeking to build USB capability into an ASIC must purchase a PHY,
a controller, and a processor, integrate them into their design, develop the software, then run the entire solution through
compliance testing. This process is arduous, time-consuming and full of risk, since the various IP blocks may not communicate
well. By providing our customers with a complete, compliance-capable solution, we can reduce their chip integration effort,
shorten their development cycle and maximize their chance of design success."
The CX6200 structured ASICs are available in versions from 140,000
to 1.8 million gates, with up to 1.2 Mbits of embedded SRAM. For synchronization solutions, the ASICs have four configurable,
low-jitter PLLs (Phase Locked Loops) that can be adjusted to have an output frequency from 10 MHz to 1 GHz. Pricing is under
$5.00 in unit volumes with production expected to commence in the fourth quarter of 2005.
JUNE 1st, 2005
Triad Announces Mixed Structured ASIC Design Kit - to Reduce
Need for Custom Design
Triad Semiconductor Inc. ahead of its arrival at the Design Automation
Conference in Anaheim on June 14th, has said it will release a design kit of the development of Mixed Structured ASIC (MSSA)
technology at the conference. The company indicates that with its design kit analog designs can be produced quickly and at
a low-cost. The designs developed with the design kit can be manufactured with Triad's via-only-programmable MSSA platforms.
Reid Wender, Triad's Manager of MSSA Design elaborated on the new
opportunities this opened up for designers, "The MDK-2005.1 enables customers to use common analog and digital front end design
tools to create mixed signal semiconductors. Triad's design flow coupled with our low cost MSSA-platform opens up mixed-signal
ASIC opportunities to designers who previously couldn't afford the tools, time, and expense associated with full-custom ASIC
design."
MAY 18th, 2005
STMicroelectronics to Downsize, 3000 to Exit - To Exclude
Asia
STMicroelectronics (NYSE:STM) on the heels of a disappointing earnings report, has now made
restructuring plans, which once completed, are expected to save $90 million a year. The plan as announced will eliminate 3,000
jobs by the middle of 2006. The company indicated that the layoffs will not include employees at its Asian locations.
STMicroelectronics for the first quarter of 2005 reported net revenues
of $2,083 million down 10.3 percent from $2,328 million reported in the fourth quarter of 2005, and up 2.6 percent from the
$2.029 reported in the first quarter of 2004. STMicroelectronics, however reported that year-over-year automotive and wireless
applications revenue grew at double digit rates year over year and that data storage products grew in the high single digit
rate.
For the first quarter of 2005, STMicroelectronics divisional sales
included $1,188 million from its Application Specific Product Groups (ASPD), $457 million form its Microcontroller, Linear
and Discrete Group (MLD), $421 million from its Memory Products Group (MPG) and $17 million from its other group. This compares
to $1,161 million for ASPD, $420 million for MLD, $431 million for MPG and $17 million for the others group in the first quarter
of 2004. For the fourth quarter of 2004, revenue for the ASPD group was $1,329 million, for MLD was $494 million, for MPG
was $486 million and for the others group, $18 million.
MAY 11th, 2005
MathStar, which has signaled plans for an initial public offering,
has just closed another round of funding. This round brought in $9.6 million, bringing total funding to $52.3 million.
The proceeds are expected to be used to market and sell MathStar's Field Programmable Object Array (FPOA). The FPOA's designed
in a 0.13 micron process, are used in network and digital signal processing applications, and intended as an alternative solution
to ASICs and FPGAs. The FPOAs offer a lower cost alternative to FPGAs, but offer performance levels near that of standard
cell ASICs, but without the inherent risk, high cost and lengthy design cycle time - effectively giving designers the best
of the FPGA and ASIC worlds. Douglas M. Pihl, MathStar's founder and CEO commented on the market potential of the new custom
chip architecture "I am absolutely convinced that MathStar's FPOAs will change the semiconductor industry for the better."
MathStar, Inc. in a separate release said it plans to raise approximately
$28 million through an initial public offering.
MAY 5th, 2005
Faraday Technology Corporation (TAIEX: 3035), a Taiwan based ASIC
design house and Intellectual Property Core provider, reported a year-over-year revenue increase of 23.3 % for the quarter
ended March 31, 2005. The company also indicated that new design wins in the first quarter, 35 % of which were overseas ASIC
design wins based on 0.13 micron technology, should enable the company to further improve its revenue. H.P. Lin, President
of Faraday Technology. elaborated on the foreign based design wins, "2005 Q1 was a quarter that showed strong momentum of
0.13um technology adoption. For the first time, Faraday's international business, which includes North America, Japan, and
Europe reported more 0.13um ASIC design-wins in a quarter than 0.18um designs. We are very excited about the business progress,
and look forward to more 0.13um ASIC projects this year."
Charlie Cheng, Vice President of International Business at Faraday
spoke further about the design outsource trends in the market, "In the past few months, we see very good traction on 0.13um
and structured ASIC technology in US, Japan, and Europe, especially in the networking and communication markets. It has been
a clear trend for design houses in these regions to outsource more projects to Asia so they can be more focused on leading-edge
technology development. Faraday's broad IP portfolio, strong design expertise and close foundry relationship are poised for
helping customers to succeed."
MAY 4th, 2005
eASIC and STMicroelectronics Report Record RTL-to-Tapeout
Time - 24 Hours
The ambitious goal of one-day RTL-to-Tapeout has been achieved through
a combination of eBeam customization and eASIC structured ASIC technology. According to eASIC, STMicroelectronics was able
to send the required final GDS-II files to a fabrication facility in less than one day, the day the RTL code was received.
Vittorio Peduto, General Manager of Computer Systems Division at
STMicroelectronics discussed the needs, "In an ongoing effort to meet our customer's escalating needs, STMicroelectronics
has developed programmable platforms and ASSPs that provide the required flexibility for new applications and configurability
for printer products. Our goal is to obtain state-of-the-art design capabilities that make it easier for us to deliver leading-edge
IC's, therefore we engaged with eASIC for its breakthrough configurable logic technology. We benefited 24hr design turn around
time from RTL to tape out. With eASIC's technology we can make very efficient use of our Direct-write eBeam equipment and
eliminate the high cost of mask for customization."
Zvi Or-Bach, CEO of eASIC Corporation revealed the chip application
and explained the no-NRE process, "STMicroelectronics and eASIC achieved this industry milestone by working together to efficiently
employ eASIC's configurable logic fabric within the Printer Platform chip. We are delighted with our joint work with a technology
leader like STMicroelectronics who has already recognized the tremendous potential and importance of Direct-write e-Beam.
This achievement demonstrates how a user of the eASIC configurable logic technology has been able to reach the goal of customizing
high density logic chips in a matter of days. This new reality of rapid design with no NRE is becoming available for high
end applications in the form of domain specific platforms by STMicroelectronics and for the main stream in the form of FlexASIC
structured ASIC solution we are rolling out jointly with Flextronics Semiconductors."
APRIL 8th, 2005
Synplicity Inc. (Nasdaq:SYNP), considered the market leader in the
FPGA design software market, has reported a major design win for its other design tool line, ASIC design tools. Samsung Electronics
Co., one of the largest semiconductor companies in the world, has selected Synplicity's Synplify ASIC synthesis software.
The design software will be available for Samsung's ASIC customers to design integrated circuits based on Samsung's ASIC technology.
Dr. Jeong-Taek Kong, Vice President of Computer-Aided Engineering
at Samsung Electronics' System LSI Division talked about the decision, "We believe the Synplify ASIC software provides
our customers with a broad range of benefits, such as the tool's ease-of-use, QoR optimization functionality and its top-down
design capabilities for multi-million gate designs. We have evaluated the ASIC synthesis product through an extensive qualification
process and now our customers can take advantage of Synplicity's ASIC software."
Other semiconductor members of the Synplify ASIC vendor program,
which Synplicity lists, include AMI Semiconductor, ChipX, eASIC, Faraday, Fujitsu, IBM, K-Micro, MagnaChip, NEC Electronics,
and Oki Semiconductor.
APRIL 7th, 2005
HARDI Electronics indicates that demand for its Rapid ASIC Prototyping
Platform has resulted in a decision to add three new sales representatives in the United States. These reps include Mission
Technology, Exis and Reptronix. These companies will cover Southern California, Northern California and Arizona and New Mexico,
respectively.
HARDI's technology received favorable reviews from all of the reps.
Ed Wahlroos, President of Mission Technology said, "We believe nothing else on the market has the I/O connectivity and
Lego-like flexibility that our customers require for ASIC Prototyping. " Art Scarla, President of Reptronix reiterated, "Customers
can snap together a prototype with known proven hardware in a matter of days. This is far superior to internal prototyping
efforts." Jim Bailey, President of Exis also commented, "We have seen tremendous interest in the HAPS boards already.
The functionality of the HAPS platform offers tremendous benefits not available elsewhere on the market."
Lars-Eric Lundgren, CEO of HARDI emphasized the acceptance of the
product, "Our recently announced HAPS-20 Rapid ASIC Prototyping Platform, with best-in-class flexibility, I/O connectivity,
and speed are already being used by several Fortune 100 companies in North America, as well as industry leaders around the
world. With the addition of these representatives we can help many more customers with the verification cycle of their ASIC
designs."
ASIC verification is considered one of the most time consuming,
expensive and engineering intensive portions of the ASIC design flow.
APRIL 5th, 2005
eASIC, a company that develps cost-optimized, NRE free ASIC designs, has
received $7.5 million in fundng. The funding is expected to be used for operations and product development of the company's
configurable logic and structured ASIC products. Kleiner Perkins Caufield & Byers (KPCB) and Vinod Khosla were investors.
Vinod Khosla, Partner at Kleiner Perkins Caufield & Byers indicated that the eASIC's technology may displace the more
expensive standard cells used for high volume custom designs, "Kleiner Perkins is inclined to invest in companies who can
instigate a disruptive innovation change and lead a major main-stream market segment. eASIC's technology ushers in a new era
of what we call Standard Metal. This displaces standard cell which is no longer a viable solution for mainstream use in the
custom logic market. This funding will help the company achieve its next milestones and prepare for its next phase of rapid
growth."
MARCH 30th, 2005
According to reports from Comtek News Network, Huawei has introduced
its GSM network-based GT 800 mobile phone. The technology includes an interphone function, which has a range of 1 kilometer.
The phone is also reported to save 30 percent in operating costs for customers per year. Huawei, which has internal ASIC design
capabilities, bases its products on independently designed ASIC chips.
MARCH 23rd, 2005
Reports from ELMOS Semiconductor AG, based in Germany, indicate
that the company has received approval for subsidies from the state of North Rhine Westphalia (NRW) . The grant was estimated
at two million Euro for investments of 60 million Euro related to the expansion of its production site at Dortmund. The
company plans to add 125 jobs there by 2007.
According to Dr. Klaus Weyer, CEO of ELMOS Semiconductor AG, "Since
the foundation the support of the state of NRW has significantly impacted the development and success of ELMOS. In the past
20 years we have created more than 600 jobs alone at the Dortmund location. In the coming years we are looking for further
growth and will thereby create new jobs."
ELMOS Semiconductor AG obtains approximately 90 percent of its revenue
from ASICs for automotive electronic applications. The company is listed on the TecDAX 30 of the German Stock Exchange.
MARCH 21st, 2005
Intel, which does a multibillion dollar business in motherboards, has selected NEC Electronics Corporation as a reciepient of its
Preferred Quality Supplier award. NEC was selected for its efforts in the supply of PSRAMs and ASICs to Intel. Toshio Nakajima,
Member of the Board, NEC Electronics Corporation; and President and CEO, NEC Electronics America, Inc. was honored to receive
the reward, which was handed out on March 15, 2005. Suresh Sachdev, Director, Component Materials Organization at Intel Corporation
indicated that NEC supplied Intel with flawless SRAMs for both new SCSP products and high volume ramps. To qualify for the
award, a supplier must obtain at least 80 percent on the Intel Report Card.
MARCH 2, 2005
Cogent Receives ASIC Chip Related Contract for
Automated Life Science Laboratory
Cogent Systems (NASDAQ:COGT) ASIC chip, based on a Dimensional Digital Signal Processor
(D2SP and a pattern recognition algorithm, is one of the primary components utilized in ANP Technologies’ Nano-Intelligent
Detection Systems. That system is reported as a low-cost, rapid, multiplexed assay for the detection of biological agents
and biomarkers. A product that is used in the pharmaceutical industry and environmental analysis fields.
Vice
President of Business Operations at ANP Technologies, Tom Bodnar, indicated that the biological detection system with ANP’s
patented nano-biotechnology and Cogent’s pattern recognition technology has greatly reduced the cost and response time
to detect biological agents. This technology should enable medical researchers
to automate the biological experimentation procedure – giving the life sciences industry the capability to greatly increase
its productivity. The system is expected to be first used for the monitoring of water quality.
Cogent
bills itself as a provider of Automated Fingerprint Identification Systems. The contract valued at $500,000, which includes
Cogent’s software technology, is said to be for the advancement of the overall technology.
FEBRUARY 28th, 2005
eSilicon Continues its Revenue Growth – Reports
Tripling of Sales
eSilicon Corporation, a one-stop design and manufacturing semiconductor
house, announced that for its fiscal third quarter it had revenue of $27 million compared to $9 million in the same period
last year. The company also noted expanded profitability. eSilicon credits its success to its general contractor model. Under
that model, the company discerns which wafer and package foundry and semiconductor process will provide the lowest cost and
best performance given the constraints of a given chip design.
FEBRUARY 17th, 2005
Faraday Technology Corporation, one of the largest ASIC design companies
in the world and considered the largest in Taiwan, reported that its January 2005 sales increased 35 percent over January
2004 levels. The company's sales for January 2005 were NT$467,157,000 compared to NT$345,350,000 in January 2004. The company
reported that sales of ASICs were 80.1 percent of the total, design services were 6.9 percent and IP core sales made up 13
percent of total sales. Faraday has been active in the development of new ASIC designs based on 0.13 micron technology.
FEBRUARY 14th, 2005
One-Stop
Custom Design House Funding Soars to $86 Million
eSilicon,
which has shown the IC community what can be done with sound logistic planning, brought its funding to date up to $86 million
with the completion of its Series F funding round. The $15 million round was led by Investor Growth Capital. NIF Ventures
and CrossBridge Venture Partners also invested. The funds will be used to expand international operations.
JANUARY 31, 2005
Dalsa’s Semiconductor
Business announced revenue of $16.2 million in the fourth quarter (2004), an 18.6% increase from the same period last year.
Total semiconductor revenue for the year was $65.8 million, up 22.1% over 2003.
Dasla reported activity from
ASICs. Its application specific contract revenue was $2.1 million in the quarter. Follow-on sales from the application specific
contracts increased 75 percent in 2004 over 2003 levels with strength reported in the fourth quarter.
Dalsa anticipates increased
sales in the second half of 2005. One of the reasons is volume production of MEMS devices based on new process technologies.
ASICs are customizable
integrated circuits. With an ASIC any type of circuit function can be built - analog-to-digital converters (ADC), advanced
microprocessors or even Zigbee wireless controllers.
There are five
basic types of ASIC circuits: gate arrays, standard cells, custom, FPGAs and PLDs. What separates FPGAs and PLDs from other
types of ASICs is the engineering and mask tooling costs. PLD and FPGA chips can be built for a few dollars. On the other
hand it can cost several million dollars to have a gate array, standard cell or custom circuit built.
This page lists
the primary ASIC companies, which have wafer manufacturing capacity (with the exception of a few notable smaller companies).
ASIC design
houses are listed in the Design House section. FPGAs and PLDs companies are listed on the FPGA page.
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