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JULY 12th, 2005
Celoxica Ltd., an electronic system level EDA company, with Calsonic
Kansei Corp., a module designer and researchers at Keio University have reported on the development of a drive-by-wire automotive
system based on FPGAs. The announcement indicated that FPGAs and not a processor or ASIC based solution, was the only practical
choice for the project in order to meet power, heat, space, design time and custom needs for different automobile applications.
According to Mr. Masatoshi Arai, manager, Advanced Engineering Development Group at Calsonic Kansei Corp. "Applying recognition
processing into automobiles requires low to medium volume, low power and rapid design to support the wide variety of chip
types needed to meet the characteristics of different cars. To meet these requirements FPGAs are a better choice than ASIC
and the DK Design Suite provided a distinct advantage by helping us to quickly design and implement the different design parameters
needed by the project."
The system built is based on license plate recognition and calculates
the safe distance needed to avoid collisions from cars in front and in back of the automobile. Colin Mason, VP Asia Pacific
and General Manager at Celoxica Japan K.K. credited the company’s design software with unleashing the power of FPGAs
for automotive applications, "Our C-based design and synthesis technology is unlocking the potential of lower power, flexible
FPGAs for next generation automotive electronics. C-based design is now the de facto enabling technology for rapidly accelerating
complex custom algorithms in high performance silicon." The system produced relied on algorithm parallelization, which enabled,
once connected to a car camera, a processing time of only 10 milliseconds.
JUNE 22nd, 2005
Celoxica Ltd. has entered into an agreement with Silicon Graphics
Inc. to develop a design platform specific to Silicon Graphics RASC environment. RASC. RASC for Reconfigurable Application-Specific
Computing, is used by SGI Graphics to refer to high performance computer systems based on an FPGA based design architecture.
According to Steve Miller, Chief Engineer, System Architecture,
at SGI, the new design methodology foregoes the need to code in HDL (hardware description languages), "For FPGA-based acceleration
in high-performance computing applications, having a software-based programming environment is extremely important. The Celoxica
tools give RASC customers an easy-to-use programming environment for accelerating their C software algorithms using the parallel
processing capabilities of FPGA without going through hardware description languages."
The FPGA computer architecture is considered an optimum fit for
such applications as data compression, decryption, genetic analysis and comparison, image recognition, and video format translation.
Such designs are reported to offer lower power consumption and heat than microprocessor based designs.
JUNE 17th, 2005
Nallatech Revenues Up 80% - FPGA Computing Noted
Nallatech has achieved record growth with its FPGA development systems.
The growth of the company is indicative of a trend that points to FPGAs as the basis of a new and efficient computer architecture.
According to Allan Cantle, CEO of Nallatech, "Nallatech is proving the viability of FPGA-based high-powered computing, particularly
in North America, with our record growth there over the past year. During the past year we have booked our two largest contracts
to date, together totaling approximately $3 Million. We are looking forward to continued expansion throughout 2005 and 2006
as FPGA awareness and adoption spreads."
The company reported that its worldwide revenue growth increased
80% and in North America, 120% for the financial year ended, April 30, 2005.
Nallatech also pointed out that over 1,000 Nallatech development
kits are now in the hands of development engineers as a result of its agreement with Xilinx, considered the world's largest
FPGA chip company.
JUNE 14th, 2005
Raytheon, IBM Corp., the Georgia Institute of Technology and Mercury
Computer Systems Inc. are all a part of a project to develop commercial applications of a new type of programmable computing
system chip. The project, funded by the Defense Advanced Research Project Agency, is referred to as the Morphable Networked
Micro-Architecture project, or Monarch. The chip is to be based on IBM's copper semiconductor technology, called Cu-08, a
90 nanometer process. Last month, as part of the development project, Raytheon Company was awarded a $27.6 million contract
to develop the technology, which according to reports should reduce the size of multi-board computational system to just a
single chip. Additionally, the new chip is intended to replace several processors and types of processors.
In late March of this year, Mercury Computer Systems announced a
family of FPGA design tools (the FDK 2.0) and IP that were specifically designed to expedite the development of FPGAs for
multiprocessor based computer designs. That technology allows the fast integration and interconnection of IP core blocks to
develop a wide range of signal processing solutions. At that time, Barry Isenstein, Vice President and General Manager of
Defense Electronics at Mercury said, "Many of our customers require signal processing solutions that use FPGA hardware. The
FDK 2.0 provides the tools and IP to rapidly prototype and develop FPGA-based applications. Integration with high- performance
switch fabrics provided by the RACE-on-Chip interconnect, and our bundled design support services, provide our customers with
a high-bandwidth interconnect while reducing project risks."
There is a current belief that the end of the microprocessor architectural
age is at hand. To replace it will be a new computer architecture based on FPGAs.
JUNE 13th, 2005
Lattice Aligns with 20 Design Partners as Market Clamors for its FPGAs
Lattice Semiconductor Corporation (NASDAQ:LSCC), after a careful selection, training and certification
process has added 20 charter partner companies to its LEADER program. Under the LEADER program, Lattices' chip customers are
offered design services and support for their product development endeavors. According to Steve Donovan, Lattice Corporate
Vice President of Sales. "Our new LEADER program will create value through close relationships among Lattice, our partners
and, most importantly, our customers. In the past twelve months, Lattice has introduced our low-cost, high-performance LatticeEC
and LatticeECP FPGAs, and our revolutionary LatticeXP non-volatile FPGAs. These products are being enthusiastically received
in the global marketplace, and, consequently, the need for local design consultation continues to grow rapidly. It's no coincidence
that we've elected to launch our LEADER program at this time, to ensure our customers receive superior design counsel and
services."
Lattice listed the design partners as: ADI Engineering, Charlottesville,
VA; ADM Designs, Phoenix, AZ; AmDATA AS, Oslo, Norway; Astek Corporation, Colorado Springs, CO; Bit 7, Mundelein, IL; Creative
Electronics, Ft. Collins, CO; Eggert Engineering, Stow, MA; Encadis, Middletown, NJ; Falcon Electronics Inc., West Newbury,
MA; Logic Product Development, Minneapolis, MN; M.A.D.S., Bedford, NH; Mixed Mode GmbH, Munich, Germany; Modelware, Red Bank,
NJ; Northwest Logic, Beaverton, OR; Nuvation, San Jose, CA; Omnisys Corporation, Raleigh, NC; Paragon Innovations, Plano,
TX; Talijon Engineering, Ottawa, Ontario, Canada; Zephyr Engineering, Tempe, AZ; Zeta Electronic Design, Inc., Hooksett, NH.
JUNE 8th, 2005
Xilinx Ships 3.5 Million 90 Nanometer FPGA Chips
Xilinx, Inc. (NASDAQ:XLNX) has passed the 3.5 million unit milestone with the shipment of if 3.5 million
90nm programmable logic devices. The company’s 90 nanometer devices include its Virtex-4, Spartan-3E, Spartan-2L and
Spartan-3 families. The company's 90 nanometer foundries include UMC and Toshiba.
JUNE 2, 2005
One-Stop Contract Design House Funded
Lyrtech Inc. (TSX Venture: LYT), a company that provides complete electronic contract services,
has entered into a $500,000 financing agreement with SociDetDe Innovatech QuDebec and ChaudiGere-Appalaches. The funding came
in the form of a 10% unsecured convertible debenture.
Lyrtech, which focuses on DSP/FPGA based technology, is partners
with a number of semiconductor companies. These include Altera, StarCore, Texas Instruments, The MathWorks, and Xilinx. All
of these companies have operations in either DSP or FPGA technology.
MAY 31st, 2005
In technical circles rumblings about a takeover of the microprocessor
market with a new FPGA computer architecture continue to surface. With the arrival of the FPGA High Performance Computing
Alliance (FHPCA ), launched on May 25 2005 in Scotland, it appears that a chip revolution may have started. The FHPCA which
consists of FPGA design architectural experts from academia to industry plans to build the most power 64 node FPGA based super
computer with processing speeds that top 1 Teraflop.
The £3.6million budget for the two year project came from the alliance
members and the Scottish Enterprise, which alone contributed £1.345 million. Among the members of the organization include
a number of leading FPGA chip, IP, R&D and system development organizations. Notable members included Alpha Data, Edinburgh
Parallel Computing Centre (EPCC), The Institute for System Level Integration (ISLI), Nallatech, and Xilinx.
A number of those involved in the project commented. Jim Wallace,
Enterprise Minister, noted the importance of the technology to Scotland, "If the Executive is to achieve its key aim of continuing
to grow Scotland's economy we need to encourage effective collaboration between industry and academia, to develop new technological
products and to explore new markets. The High Performance Computing Alliance is an excellent example of this type of successful
partnership working - bringing together some of the world's leading computing experts to develop truly groundbreaking technology
which will place Scotland at the forefront of microelectronic innovation and design. The Supercomputer that the Alliance is
creating will have far-reaching benefits in areas such as life sciences, climate change and games technology, and ultimately
generate new knowledge and wealth for Scotland."
On the other hand, Patrick Lysaght, Senior Director Xilinx Research
Labs alluded to the replacement of older computer architectures that are based on the classical microprocessor, "the use of
FPGAs in high performance computing brings superior performance for many important classes of problems. The key to this improvement
is to use arrays of FPGAs instead of older architectures based on sequential computers. The natural concurrency of the algorithms
can be best exploited by mapping them to FPGAs with all the advantages of highly specialized data paths, customized memory
interfaces and optimized interconnection topologies. The tremendous flexibility of Xilinx FPGAs makes it possible to create
a custom computing environment for each class of problem".
Stating the absolute market significance of the new FPGA computer
architecture was Chief Executive of Scottish Enterprise Edinburgh and Lothian, Jim McFarlane, "The development of high performance
computing technology is on the cusp of the most significant advance since large clusters of PC servers replaced giant mainframe
computers. Scotland has a strong presence in the technology underpinning reconfigurable computing and we are determined to
exploit the window of opportunity our expertise offers." He also underlined the critical role the alliance will play in making
Scotland a major global technology force, "We have brought together the best in world to collaborate on this project which
will place us at the forefront of the implementation of a technology whose time has come. It is an exciting programme that
will help transform indigenous Scottish companies into major global players of scale in this field, while creating significant
added value to the economy."
MAY 16th, 2005
QuickLogic Corporation (NASDAQ:QUIK), a company with core low power
FPGA technology, reported that its revenue for its first quarter ended March 31, 2005, was up 21 percent year-over-year and
13 percent sequentially. The company's ESP (Embedded Standard Products) and Advanced ESP products contributed 34 percent
of the revenue for the first quarter of 2005.
Tom Hart, Chairman, President and CEO at Quicklogic commented on
the companies bookings and the design momentum of its FPGA products, "We are very pleased with 13% sequential revenue growth
and particularly our return to profitability in the first quarter. Net bookings in the quarter were at an all time high. In
addition, our new QuickPCI II and Eclipse II FPGAs -- the lowest power FPGAs in the industry -- continue to build design momentum
with our customers and partners. Our confidence in the revenue potential from these products continues to grow."
MAY 11th, 2005
MathStar, which has signaled plans for an initial public offering,
has just closed another round of funding. This round brought in $9.6 million, bringing total funding to $52.3 million.
The proceeds are expected to be used to market and sell MathStar's Field Programmable Object Array (FPOA). The FPOA's designed
in a 0.13 micron process, are used in network and digital signal processing applications, and intended as an alternative solution
to ASICs and FPGAs. The FPOAs offer a lower cost alternative to FPGAs, but offer performance levels near that of standard
cell ASICs, but without the inherent risk, high cost and lengthy design cycle time - effectively giving designers the best
of the FPGA and ASIC worlds. Douglas M. Pihl, MathStar's founder and CEO commented on the market potential of the new custom
chip architecture "I am absolutely convinced that MathStar's FPOAs will change the semiconductor industry for the better."
MathStar, Inc. in a separate release said it plans to raise approximately
$28 million through an initial public offering.
MAY 6, 2005
Cypress Takes Low-Cost Programmable Mixed Signal SOC Chip
to Market
Cypress Semiconductor Corporation (NYSE:CY) has introduced its CY8C21x23,
a programmable mixed signal System on Chip (SoC). The integrated circuit has been targeted at low-cost appliances and industrial
control applications. Typical applications that Cypress lists include fan controllers, battery chargers, security sensors
and control, large sensor arrays, and smart temperature, pressure and flow sensors.
John McDonald, Marketing Director for the company's Programmable
SoC division, emphasized the low cost and small package, "The CY8C21x23 delivers PSoC's well-known analog and digital functionality
and flexibility in a very small package and at an aggressive price point. This solution extends our range of value-priced
options, offering designers the ability to differentiate end products in a variety of high-volume applications."
Packages for the CY8C21x23 include 8- and 16-pin SOIC, 20-pin SSOP,
and the 24-pin 4x4 MLF. The 8-pin SOIC packaged device starts at $0.55 each - 10,000-unit quantities.
MAY 3rd, 2005
Mass spectrometry based on FPGA design architectures may offer cost-performance
benefits that far exceed what can be obtained with today's microprocessors. Research through the Blueprint Initiative by Edward
S. Rogers Sr. indicates that computational intensive genetic analyses tasks could be greatly reduced with an FPGA based design
architecture. As well, Userspace also is looking into FPGA based processors to enable real time analysis of large amounts
of genetic data. The company is presently evalulating IPFlex's configurable processor for use in a mass spectrometry application.
Sanjaya Joshi, CTO of Userspace commented, "With protein characterization now one of the cornerstones of Systems Biology,
real-time mass spectrometry will spearhead the understanding of disease processes. This means tagging and searching of mass
spectral data in real-time. The IPFlex DAPDNA platform would be evaluated as a flow-processor for this standardization."
Koichi Hagishima, President and CEO of IPFlex, states: "Userspace is the
first customer in the US since starting sales and marketing activities in January. We believe the field of life sciences is
where much growth is expected, and are excited that our products are adding value to the users in this field. I look forward
to a successful working relationship with Userspace."
The DAPDNA-2 dual-core processor from IPFlex includes a RISC processor
core, a dynamically reconfigurable core and a two-dimensional array of 376 processing elements. One of the unique elements
of DPADNA-2 is that the chip hardware can be configured during system hardware operation in one clock cycle.
MAY 3rd, 2005
Developed with Xilinx' FPGA chip technology, Micro Memory has announced
the development of its CoSine SoC for digital signal processing applications. Mike Jadon, Director of Product Marketing at
Micro Memory. described the system advantages of the design, "Through the use of a large, multi-ported memory buffer tightly
integrated with the UPL block and a corner turning DMA engine, CoSine significantly reduces this inefficiency for downstream
DSP's. This unique combination enables downstream DSP's to spend a higher percentage of time and resources on intelligent
data manipulation, reducing overhead and system complexity."
Erich Goetting, Xilinx Vice President & General Manager Advanced
Products Division, commented on the design of the chip, "CoSine is a truly impressive System-on-Chip. By combining Micro Memory's
high-performance custom logic with multiple PowerPC cores, Multi-Gigabit Rocket I/O Transceivers, and Xilinx LogiCORE IP,
CoSine represents an excellent example of what can be achieved with the Virtex-II Pro family of FPGA's. As the cornerstone
of Micro Memory's embedded platforms, this IC should prove a key enabler for next-generation signal processing equipment."
APRIL 20th, 2005
Lattice Semiconductor Corporation (NASDAQ: LSCC) and Synplicity
Incorporated (NASDAQ: SYNP) entered into a development and marketing agreement that is intended to enhance the design and
performance of Lattice's FPGA chips. Joe Gianelli, Synplicity VP Business Development, said, "This agreement reflects our
unqualified commitment to deliver unprecedented device performance for Lattice FPGA products in our Synplify Pro software.
Performance is a hallmark of Synplicity's synthesis tools, and we are eager to continually expand and improve our support
for Lattice FPGAs."
APRIL 8th, 2005
Elixent announced the first close of a funding round that is
expected to total $15 million at the final close. The initial investment included financial commitments from Panasonic Digital
Concepts Center, a venture capital arm of Matsushita Electric Industrial Co., Ltd., Toshiba Corporation as well as 3i, GIMV
and NIF Ventures.
Mr. Yoshio Ooida, Executive Vice President, Toshiba Corporation
Semiconductor Company. commented on the investment and Toshiba's relationship with Elixent, "We've worked with Elixent
for two years now and this investment shows our ongoing commitment to the company and the system-on-chip technology we've
developed together." Mr. Dilip Sampath, Partner, Panasonic Digital Concepts Center added, "Reconfigurable technology will
play a key role in the next generation of consumer electronics. Our investment in Elixent demonstrates our high expectations
of its technology and the market."
Elixent is known for D-Fabrix, a patented reconfigurable algorithm
processing (RAP) technology, which offers lower power than other programmable technologies and is considered a competitive
cost-performance alternative to custom based designs such as standard cells.
Elixent has also just licensed its D-Fabrix, RAP technology,
D-Fabrix, to Matsushita Electric Industrial Co., Ltd.. Matsushita plans to develop system-on-chips (SoCs) for advanced multimedia
and communications consumer products with the technology. Prototype chips have already been produced at Matsushita's Semiconductor
Company wafer fabrication facilities.
Katsuhiko Ueda, General Manager, Corporate System LSI Development
Division of Matsushita's Semiconductor Company offered reasons for the Elixent decision, "A platform SoC strategy is essential
to be competitive in consumer electronics. We are impressed by Elixent's technology and believe it will become the de-facto
standard for reconfigurable technology inside consumer electronics. It will certainly help to position us well for future
market requirements."
APRIL 8th, 2005
Tower Semiconductor Ltd. (Nasdaq:TSEM) (TASE:TSEM) and QuickLogic
Corporation (Nasdaq:QUIK) have revealed that Quicklogic's Eclipse II family of uWatt FPGA chips are manufactured with Tower's
0.18 micron, six layer metal CMOS process. The process, as well as the design, resulted in a standby current for the programmable
chip in the order of 14 micro amperes.
Tom Hart, QuickLogic's Chairman, President and CEO expounded on
Tower's FPGA low-power foundry capabilities and the target market for the FPGAs, "Tower's advanced technology platform, supported
by excellent customer service, combined to give our products a competitive edge for applications where every micro-Watt counts,
QuickLogic's uWatt FPGA and uWatt Programmable Bridging products are gaining significant traction in the portable application
space. Additionally, the devices' support of the industrial temperature range makes them ideally suitable for rugged working
environments, where active cooling systems or heat sinks are not feasible due to reliability or form factor requirements."
Doron Simon, President of Tower Semiconductor USA, Inc. added, "The
move to Tower's 0.18-micron process, as well as the intense engineering collaboration between our companies enhanced the product's
low leakage, low power characteristics. Tower's 0.18-micron technology platform has enabled QuickLogic to ramp production
of an optimized set of programmable products, opening up new high volume market opportunities for both companies."
FPGAs are considered one of the most difficult types of integrated
circuits to manufacturer. Few companies possess the know-how to fabricated FPGAs with high yields, let alone low-power operating
characteristics.
MARCH 16th, 2005
MathStar Field Programmable Object Array Chips Selected By Honeywell
Honeywell has selected
MathStar's Field Programmable Object Array (FPOA) chips for use in its semiconductors that are intended for satellite applications.
The FPOAs are considered a lower cost alternative to expensive ASIC chips and a higher performance alterative to FPGAs.
MARCH 14th, 2005
FPGA Market in Apparent Upswing
Contrary to trends in other
segments of the IC market, a number of the mainstream FPGA chip companies have announced positive forecasts for revenues for
the first quarter. These include Altera, Xilinx and Actel. Altera increased its forecast to a 6 percent sequential gain from
the fourth quarter, compared to previous guidance of 1 percent to 3 percent. The company indicated that sales to its customers
in the communications segment had increased faster than had originally been anticipated.
The company also reported that more than 250 customers had purchased its new 90 nanometer Stratix II FPGA family of
chips.
Actel also anticipates a
similar sequential gain in its upcoming first quarter sales. The company projected
that its gross margin would be in the order of 59 percent.
Finally, the market leader,
Xilinx has reported that it anticipates that for its March quarter of fiscal 2005 it expects sales to increase 5 percent to
8 percent sequentially. This is up from guidance of between 1 percent and 5 percent
given earlier. Xilinx expects its gross margin to be in the order of 62 percent.
So will FPGAs gain a higher
percentage share of the IC market as we move into the second half of the first decade?
With the fast pace of change in technology no one can say for certain. However, FPGAs offer a much lower cost alternative
to the ever growing non-recurring engineering charges that are required for ASICs and custom chips. And with lower unit costs
for FPGAs as a result of the arrival of mainstream 90 nanometer semiconductor processors,
FPGAs are considered by some in a better position to take away market share from the higher volume segments of the
standard cell ASIC market. Furthermore, there are rumblings that FPGA architectures may replace or offer a cost-effective
replacement for the age-old microprocessor architecture used in today's PCs. If
true, this would require Advanced Micro Devices and others such as Intel, to rethink their entire operations. Something that would require a tremendous change in these companies entire technology infrastructure -
and perhaps require these companies turn in the old guard.
MARCH 7th, 2005
Xilinx FPGA Designer Base Rises to Over 200,000 Designers For Many Reasons
With the release of
its 7.1i Integrated Software Environment (ISE) used for the development of Virtex and Spartan based FPGA designs, Xilinc's
software is expected to resolve a number of design issues that its user based of over 200,000 design engineers face in the
energy age. The design tool, which has been tailored for Linux-based design environments, has a number of power analysis tools built in. The XPower tool and the Xilinx Web Tools, which are used to analyze the
power consumption of your FPGA design, also can be used to illustrate the energy bill advantage Xilinx's 90 nm FPGAs have
over the competitions' 90 nm FPGAs. Xilinx indicates that the energy bill can be up to ten times less with its 90 nm FPGAs.
An important consideration for company's that want to sell their end-products into energy-conscience countries.
Xilinx also reports
that the new software release reduces FPGA real time verification time in the order of 50 percent. For this the simulator
makes use of its ChipScope Pro module, which can interface to Xilinx's in-house computer network and software.
The software also permits
rapid virtual prototyping of proposed architectures. In order to assess silicon areas, system electrical specifications of
a number of proposed block level chip designs, one can make use of the PlanAhead module incorporated into the ISE platform.
With this platform, one can determine quickly which architecture will have the best cost / performance ratio and which architecture
will be least likely to suffer from design reiterations or respins.
The ISE 7.1i design
software, with the above options and more, varies in price from $695 to $2495 depending on the configuration selected.
MARCH 4, 2005
Nallatech Launches FPGA Based Mixed Signal Module For Wireless
System Applications
Nallatech, a provider of FPGA solutions, has introduced its BenADDA-Pro
analog data processing module. The module based on Xilinx's Virtex-II Pro XC2VP50 FPGA device, permits the user to incorporate
the FPGA's dual embedded PowerPC processors, 232 embedded multipliers and 8 Mbytes of FPGA block RAM into Nallatech mixed
signal FPGA based wireless architectural solutions. The complete module solution includes high speed ADCs and DACs. Sampling
rate of the ADCs is speced at 105 Msps at 14-bits and the DAC conversion rate at 160 Msps at 14-bits.
The module is targeted at a number of applications that require high
speed mixed signal design technology. Specific applications listed by Nallatech include direct intermediate frequency processing
in wireless communication systems, radar processing, software-defined radio, infrared imaging and wideband cable systems.
Nallatech has traditional focused on providing its customers with design architecture solutions for Data Communications, Digital
Signal and Image Processing systems.
FEBRUARY 26th, 2005
Actel’s
Distributed RAM Critical to General Vision’s Scaled Memory Design
General Vision has
selected Actel’s ProASIC Plus FPGA for use in its CogniSight image recognition technology. Guy Paillet, a partner at General Vision indicated
the FPGA's distributed RAM was a critical reason for the selection, especially because of design constraints required for
General Vision's neural chips. General Vision had to scale the memory blocks
but keep the FPGA package size and I/O count the same. General Vision's chips recognize images through the use of what the
company terms as silicon neurons or neuro memory.
FEBRUARY 17th, 2005
Xilinx Reports Further Increase in PLD Market Share
Citing its low-power Coolrunner CPLD chips, Xilinx reported that
its financial data for the fourth quarter indicates it has gained market share in the CPLD (complex programmable logic
devices) market. The company estimates that its PLD sales accounted for 10 percent of the company's total PLD revenue in 2004.
Xilinx also has indicated that its complex PLD market share has consecutively increased over the last 16 quarters. This has
resulted, according to Xilinx’s calculations, in the rise of Xilinx to the number two position in the CPLD
market.
An important component of the company’s CPLD revenue growth
has been Xilinx's CoolRunner-II CPLD products, which have seen revenue growth of more than 50 percent from quarter to quarter.
CoolRunner-II products operate off a 1.8 volt supply, critical for low-power system applications. Besides the 1.8 volt supply
level, the Cool-Runner products have a unique internal design circuit structure, which allows for deeper cuts in power consumption.
Xilinx indicates that CoolRunner has seen rapid adoption in the low power portable consumer electronics market segment. Xilinx
also says the adoption of its CPLD has been across many different market segments and companies, both large and small. No
single company is attributed to the rapid increase in CPLD sales. The implication is that Xilinx's revenue from these products
is not dependant on one or two major customers, which is often the case with many products other fabless companies offer.
FEBRUARY 7, 2005
M2000 Releases Record Breaking FPGA IP Cores
M2000, based in France,
has announced that its FlexEOS embedded FPGA IP cores (macros) are available now. The company reports that these FPGA cores,
which work with 90 nanometer technology, have a density of 1,000 reprogrammable Look-Up Tables (LUTs) per square millimeter,
98,304 LUTs and a speed rating of 2.7 GHz. The cores, besides through M2000 headquarters
in France, are also available through Spinnaker in Japan, Mindcrea OY in the United Kingdom
and Scandinavia, and very soon through a new Silicon Valley sales office.
FEBRUARY 3, 2005
Quicklogic Reports Record FPGA Orders
Quicklogic, an FPGA chip
company, reported that new orders for its fourth quarter were the highest in the company’s history. Apparently, low
power is the secret to success in today’s energy concerned world. Quicklogic says that its QuickPCI II and Eclipse II
FPGAs, which Quicklogic believes are the lowest power FPGAs in the industry, are expected to begin generating significant
revenue early this year.
QuickLogic Corporation,
also announced revenues for the year and the quarter ended December 31, 2004. Revenue for 2004 increased to $44.6 million,
up 6% from revenue of $42.0 million in 2003. Fourth quarter revenue was however
down 7 percent from the third quarter of 2004.
JANUARY 31, 2005
Lattice Sees Quarterly Revenue A Little Higher
One has to wonder if Lattice’s entry into the FPGA market will put it back onto the growth track. It has been a while since the company acquired Agere’s
FPGA division. For its next quarter, Lattice sees the high end of its revenue
forecast, slightly exceeding its fourth quarter 2004 sales of $48.5 million. Lattice’s
revenue hit $57 million in the third quarter of 2004.
JANUARY 26th, 2005
The Photonics Products Division of Pirelli selected Lattice Semiconductor’s Field Programmable System Chip for
use in its Metro Access Systems Platform.
Panasonic Mobile Communications Ltd. selected Altera’s Stratix GX FPGA and Nios embedded processor for the design
of its 3.5G network base transceiver station.
THE FPGA, FPAA, PLD NEWS COLUMN
JANUARY 11th 2005
Actel Scores FPGA Design Win
Actel Corp (NASDAQ:ACTL) announced today that UTStarcom has selected its SX-A field programmable gate array
for use on CPU control boards found in its mSwitch and 3G products. UTStarcom
is a Fortune 1000 company with international operations in network access equipment and services.
FPGAs (Field Programmable Gate Arrays) are expected to become more popular as the mask costs for ASIC gate
arrays and standard cells continue to increase, and the price of FPGAs continue to decrease. The companies listed here provide
FPGAs, programmable logic devices (PLD) and Field Programmable Analog Arrays (FPAA). Anadigm and Lattice Semiconductor both
have FPAAs.
Although Quicksilver does not specifically fall into the category of a FPGA company, Quicksilver does provide a design
architecture, which allows an ASIC design engineer to integrate a FPGA structure into an ASIC chip. Because of this technology,
companies now have the capability to develop hardware reconfigurable SoCs. This allows the circuit function of a chip to be
changed under actual system software control.
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