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JULY 15th, 2005
Addressing the digital camera and phone camera market, IBM has made
available a foundry service based on its 0.18 micron copper CMOS semiconductor process image sensor technology licensed from
Kodak. The design kit enables the integration of a 4-transistor, 3 micron pixel technology and components from IBM’s
image sensor design library. IBM indicates that the technology features dark current specifications that permit the design
of cameras that are able to operate well in low-light settings. Other technology features IBM points to include on-chip color
filters and microlens, angle response performance as well as a 2.5 micron copper stack, which is often incorporated to improve
light collection efficiency.
Tom Reeves, Vice President, Semiconductor Products for IBM Systems
& Technology Group also listed benefits of IBM technology for phone photo applications, "IBM is bringing its extensive
copper semiconductor process experience to bear on the CMOS image sensor market, offering clients what we believe is the best
foundry technology available today. Our innovative technology produces sensors with excellent color accuracy, low noise and
very competitive low-light performance that can help clients differentiate their products in this competitive and growing
consumer market."
Chris McNiffe, General Manager of Kodak's Image Sensor solutions
business, which also has its own line of image sensors, had this to say about the combination of Kodak and IBM technology,
"We are pleased to see Kodak's image sensor technology at the heart of IBM's new foundry offering. Our collaboration with
IBM has been extremely successful thus far, leveraging our respective strengths in imaging and semiconductor manufacturing."
JULY 15th, 2005
Silicon Quest’s New Department
Addresses Start-Up’s Needs for Process Expertise
Silicon Quest International (SQI has announced their new Materials
Engineering Department. The department offers technical consulting and business development services to semiconductor companies.
SQI indicated that the service has new companies in mind. Small fabless companies often need to be aware of critical materials
and process issues to implement MEMS and analog technology optimally.
SQI's new Vice President of Technology and Product Development,
Dr. Zbigniew Radzimski is heading up the company’s new department.
SQI supplies a complete range of silicon wafers, often used to test
semiconductor process technologies. Some of the company’s offerings are silicon-on-insulator (SOI) and solar wafers.
JULY 14th, 2005
Shellcase Works on China Market With Wafer Level Package Technology
Shellcase Ltd., which estimates that its chip packages are used in over 30 percent of all camera
phone headsets, has continued its market leadership with a license for its wafer-level chip size packaging from China WLSCP,
a semiconductor packaging house based in Suzhou, China.
China WLSCP sees wide acceptance for the product in the optical
market. According to Wang Wei, CEO of China WLCSP, "We are thrilled to partner with Shellcase and bring this much needed miniaturization
technology to the Chinese market. I expect that WLCSP will soon become the packaging option of choice for optical device manufacturers
in China."
Shellcase recently introduced its latest package solution for optical
devices that include microlenses. Called the ShellUltraThin, the very thin clear package is designed to allow the camera to
process images through the package.
Shellcase offers packages for CMOS and CCD area array and linear
sensors, photodiodes, as well as RF-MEMS and mixed signal devices.
JULY 12th, 2005
Honeywell (NYSE:HON) has reported that it will invest over the next
five years at least $5 million in Albany NanoTech, a nanoelectronic research facility affiliated with the University at Albany
(SUNY).. The investment is intended to enhance Honeywell’s existing nanomaterials development work.
As part of the investment, Honeywell plans to add laboratory equipment
and its own researchers at Albany NanoTech’s research center. There it will work on nanomaterials for the further development
of semiconductor manufacturing processes. According to Dr. Saket Chadda, Chief Technology Officer at Honeywell Electronic
Materials, "Honeywell Electronic Materials has long been a leader in innovative materials which are the critical building
blocks for integrated circuit chip production. This investment will allow us to continue to develop new materials critical
to continuing the relentless pace of circuit miniaturization."
The facility at Albany NanoTech is 450,000 square feet and contains
a 200 mm / 300 mm wafer facility for the development of advanced integrated circuits, which include System-on-Chip, biochips,
photonic devices, sensors and high-speed communications devices. The fab is housed in a 65,000 square foot Class 1 clean room.
The Albany NanoTech facility is part of a $1.4 billion project by
the State of New York and a number of industrial partners to establish five Centers of Excellence for the further development
of nanoelectronics and other advanced technologies.
JULY 12th, 2005
Tegal Corporation (NASDAQ:TGAL), a semiconductor equipment supplier
that provides equipment for the production of micromachine, magnetic memory and ferroelectric memory integrated circuit production
as well as wireless components has entered into a definitive agreement to sell $22.5 million of common stock and warrants
to investors. The offering is expected to take place in two phases. The first phase would raise $4.1 million and the second
$18.4 million. The offering needs final approval from shareholders, which is expected to occur at meeting scheduled for September
13, 2005.
JULY 11th, 2005
As a strategic business move, Eastman Kodak Company, known for its
photography technology and cameras throughout the world, has licensed its CMOS image sensor technology to Taiwan Semiconductor
Manufacturing Company Limited (TSMC) (NYSE:TSM)(TSE:2330). The Kodak technologies license includes four-transistor (4T) pixel
and pinned photo-diode pixel architectures, which are expected to be available through TSMC for other semiconductor companies
to base their CMOS image sensors designs on. According to TSMC’s Ken Chen, Director of Mainstream Technology Marketing,
"As the leading foundry for CMOS image sensors (CIS), TSMC is committed to providing the most advanced CIS technology for
our customers. This agreement with Kodak will allow TSMC to continue our leadership position in CIS by supporting manufacture
of the most advanced, state-of-the-art CIS designs, and to provide a licensed manufacturing platform to all CIS design companies
to meet the growing industry demands for image sensors used in digital camera and mobile imaging applications."
TSMC indicates that the license agreement is part of Kodak’s
plan to use its intellectual property as a way to further revenue from the growing mass consumer market, which is using CMOS
image sensors on items such as cellular phones. According to Chris McNiffe, General Manager of Kodak's Image Sensor
Solutions business, "This agreement further expands Kodak's ability to meet the exploding demand for CIS devices used in consumer
imaging applications. Our agreement with TSMC augments our existing manufacturing agreements, and again demonstrates Kodak's
commitment to execute its digital strategy. We are excited to be working with TSMC to support the manufacture of CIS designs
that utilize Kodak's core IP."
JULY 11th, 2005
E-Manufacturing Tools Central to Analyzing
Global Wafer Fabrication Data in Real-Time
ILS Technology, which provides a secure e-manufacturing software
package for networks of multi-billion dollar semiconductor wafer fabrication facilities, announced several enhancements to
its e-manufacturing software package as part of its scheduled appearance at Semicon West. According to Bill Ramus, Senior
Vice president of Commercial Management at ILS Technology, "We have added some significant new features to eCentre based on
extensive feedback from fab equipment manufacturers (OEMs) operating at several different IC manufacturers (ICMs). The gist
of the new features is increased efficiency in monitoring and updating OEM tools, with access to knowledge and data from the
OEM's home site directly into the fab, and vice-versa. This is all done with the leading security capability for which ILS
is known. Now, OEMs can have all the information they need at their tools on the fab floor, and each new feature can be toggled
on or off as required by the hosting ICM's security team."
The list of new features for ILS products focuses on the establishment
of a sophisticated network infrastructure that can be used to tie all of an IC manufacturers wafer fabrication facilities
together down to the equipment level. For example, a manufacturer with several wafer fabrication lines located in widely separated
geographic regions could examine the yields at each manufacturing step at each factory in retail time. From the control panel,
adjustments of equipment could be made to increase the yield levels for specific equipment for specific manufacturing procedures.
JULY 11th, 2005
IMEC and Semizone System-to-Process Courses
Expected to Improve IC Industry’s Bottom Line
As process technologies shrink the need to know the effect of designers’
high-level architectural decisions on yield become more important. This has generated a demand for engineers to fully understand
not only architectural level design but advanced semiconductor process technology. Helping bridge the gap between RTL coding,
process technology and design for yield are Semizone Inc and IMEC. IMEC, which is currently developing sub-45 nanometer processes
for the next-generation of ICs with a number of the world’s leading IC companies through the NANOCMOS program, has joined
with Semizone, a provider of online learning content for the semiconductor industry, to provide a range of courses that extend
from high level system design, through chip level design, down to the nanometer world of IC process technology. The courses
are designed for mainstream chip designers, as well as process engineers and process technicians – enabling both fabless
and IDM (Integrated Device Manufacturers) companies to maximize understanding throughout their entire organization.
Noting the value of having IMEC as a partner was Mehrdad Moslehi,
Ph.D., Chairman and CEO, Semizone, Inc., "We can't think of a more compelling joint development partnership in Europe than
an alliance with a premiere nanoelectronics research institute such as IMEC. Our business focuses on providing the latest
industry-relevant knowledge and technological developments to the semiconductor industry workforce through a global online
learning delivery platform. IMEC is a well-respected, internationally recognized research center, which jointly with Semizone,
is now providing leading-edge educational and training content to the industry. Our alliance with IMEC should further enhance
Semizone's online learning programs and methodology in Europe."
Professor Gilbert Declerck, President and CEO, IMEC, indicated that
the Semizone’s programs would be an excellent way to inform the semiconductor world of his company’s leading edge
research and as an educational tool for IMEC’s own workforce, "We are pleased to partner with Semizone to provide industry-relevant
and up-to-date online learning programs for the microelectronics industry through Semizone's proven online learning business.
In recent years, IMEC has invested substantially in e-learning. This also provides a comprehensive source of knowledge to
the IMEC workforce, available for access on demand. Through our partnership with Semizone, we are now able to deliver leading-edge
knowledge and IMEC-produced innovations to the global semiconductor industry through Semizone's global distribution and delivery
system."
Semizone presently has hundreds of programs and modules and thousands
of learning modules. These are all accessible through the company’s web-based learning management system.
JULY 6th, 2005
Outsource Twist - On Semiconductor Brings
Fab Home to Save $30 Million
As most semiconductor companies outsource wafer fabrication work
or move off-shore to save costs, On Semiconductor (NASDAQ: ONNN), has done the opposite. The company has said that it will
transfer its wafer fabrication facility in Seremban Malaysia to its Phoenix Arizona facility in an effort that is expected
to save $25 million to $30 million over the next five years. The closing of the fab is expected to eliminate 80 jobs. The
Phoenix wafer fab has 60,000 square feet of manufacturing space and is said to be able to increase its output without a significant
increase in employees or cost.
The company plans for new to keep its 281,000 square foot assembly
and test facility at Site 1 in Seremban, one of On’s largest manufacturing sites. However the company did indicate that
it is looking at integrating its other facilities into the Phoenix unit, which is the company’s center for its Lean
Six Sigma methodologies and also considered one of On’s most efficient manufacturing operations.
JULY 6th, 2005
Contaminated Wafer Water May Be Valuable
Source of Chemicals
With news from Japan, that Sanyo has reclaimed valuable Calcium
Fluoride from semiconductor wafer processing waste water, it may be a time for semiconductor companies to start looking around
for profitable ways to clean up water adversely affected by semiconductor operations. It may be that those parts per millions
going down the drain could actually be dollars per million instead of potential environmental law suits.
JUNE 27th, 2005
Cornerstone of India’s Semiconductor
Wafer Fabrication Capacity Placed
Reports coming out of India indicate that an opening ceremony at
the Rajiv Gandhi Nanotechnology Park for the largest based fabrication facility in India has occurred. The initial project
is expected to cost around $600 million, but indications are that plans are eventually to expand the project into the multi-billion
dollar range. Although IBM was initially thought to be a major investor in the facility, more recent reports indicate that
IBM’s entrance into India’s fabrication market may not be assured. Investors are expected to be announced over
the next two months. Surrounding the foundry were organization names such as Nano-Tech Silicon India Pvt. Ltd., Andhra Pradesh
Industrial Infrastructure Corporation, Intellect Inc. and India Semiconductor Manufacturing Company.
Fabs in the $1 billon dollar range in general have a capacity in
the order of 30,000 eight inch wafers per month and can take anywhere from 18 months to 36 months to bring on line.
JUNE 22nd, 2005
NEC Electronics Reports 50 Percent less Interconnect Density at 45 Nanometers
NEC Electronics through the MIRAI Project (Millennium Research for Advanced Information Technology)
has developed a new molecular based technique for the development of its 45-nanometer semiconductor manufacturing process.
According to the company, the new 45 nanometer process, when compared to 65 nanometer processes, enables a doubling of the
interconnect density, a 16 percent reduction in interconnect parasitics, which in turn improves the operational speed and
power consumption characteristics of chips based on the process.
NEC bases the new process on what it calls MPS technology. That
technology is based on silica molecules, which contain silicon and oxygen atoms, arranged in a circular chain structure that
envelops a pore. The technique is said to allow a tighter control of low k film characteristics. In this case, NEC was
able to obtain a dielectric constant less than the required 2.5, and improve the insulation between interconnects.
JUNE 22nd, 2005
Molecular Imprints, Inc., a provider of nanoimprint systems with
feature capabilities in the order of 20 nanometers, has sold its
Imprio systems to three nanotechnology research organizations.
These include Lawrence Berkeley National Lab's Molecular Foundry, the Microelectronics Research Center at the University of
Texas at Austin, and the Pennsylvania State Nanofabrication Facility.
The tools are expected to be used to conduct material research relevant
to the development of biosensors, nanophotonics, and optoelectronics.
JUNE 20th, 2005
Like out of the age-old fairly tale of Rumplestilsken, where the woman
spins golden yarn, scientists have now been able to spin multifunctional yarns from carbon nanofibers. Scientists at The University
of Texas at Dallas [UTD] NanoTech Institute and an Australian textile spinner expert were awarded the New Materials Innovation
Prize of the Avantex International Forum for Innovative Textiles. The scientists were awarded the prize for a process they
have developed that enables trillions of nanosize fibers to be spun into super-strength electronic conducting yarn. The yarn
has numerous applications in medicine, energy and electronics. In the medical area, artificial muscles was one application
noted.
The three that were awarded the prize were Dr. Mei Zhang and Dr. Ray
H. Baughman of the UTD NanoTech Institute and Dr. Ken Atkinson of the Commonwealth Scientific and Industrial Research Organization
[CSIRO]. Dr. Atkinson is known as an expert in wool spinning technology at the Australian national laboratory.
The patent pending technology, which is co-owned by UTD and CSIRO,
indicate that the nanotube yarn spinning process can be applied to the production of a number of specific products. These
include building materials, conductive and protective textiles, displays, fuel cells, sensors, supercapacitors, and thermal
heat pipes.
The licenses for these patents are expected to be made available in
November.
JUNE 20th, 2005
Dow Corning Corporation with the announcement that AMD has approved
its thermally conductive grease ( TC-5022), for use with its microprocessors, also reported that customer testing of TC-5022
offered a 10 to 15 percent reduction in thermal resistance. The lower level of thermal resistance facilitates the transfer
of heat away from the integrated circuit package to the heat sink, which transfers the heat sink. With the resultant lower
package temperatures, designers have further flexibility in selecting lower cost packages.
Mike Eyman, member of Technical Staff at AMD confirmed the need for
the conductive grease, "Enhancing processor heat dissipation is an important industry focus, and AMD is committed to working
with market leaders such as Dow Corning to find innovative solutions to meet customers' needs. TC-5022 is an excellent product
that will enhance the cooling efficiency of AMD's server, workstation and desktop products."
JUNE 17th, 2005
Denso Corporation to Build New Wafer
Fabrication Facility - 17 Billion Yen Allocated
Denso Corporation, a major automotive components company in Japan
with its own semiconductor research, design and manufacturing facilities, has allocated 17 billion yen to build a new eight
inch wafer fabrication facility. The facility to be built at Denso's Kota facility, located in the heart of Japan, will have
the capacity, once complete, to produce 10,000 eight inch wafers per month. The facility, which was scheduled for the construction
phase this month, is expected to be on line in June of 2006.
Details released about the new facility indicate that it will have
a total floor space of 26,000 square meters with a 4000 square foot clean room. The facility will not reach peak production
of 10,000 eight inch wafers per month until the year 2010. The facility will produce integrated circuits for automotive applications.
By contrast, Denso's current wafer fab has an area of 283,000 square
meters and a capacity of 23,000 six inch wafers per month. That facility employs 3,800 employees. Worldwide, Denso employs
104,000 in all of its operations.
JUNE 17th, 2005
Trazar Obtains Exclusive License from Cubic
for RF Based Wafer Cleaning Device
Trazar Corporation has entered into an exclusive licensing agreement
with the Communications Business Unit of Cubic Defense Applications, a division of Cubic Corporations (AMEX:CUB). The agreement
for RF generators, which relates to both manufacturing and marketing of the products, is part of Trazar’s plan
to enter the megasonic cleaning segment of the semiconductor wafer production and medical markets.
Rick Lober, Senior Vice president of Cubic's Communications Business
Unit commented about the need for the commercial sector to make use of the RF generators, "Cubic Defense Applications is focused
on its core defense business, but our RF generator product line clearly has broader applications. This relationship provides
commercial customers the best access and support for their RF generator requirements.
The RF generators produce frequencies in the range of 350 KHz to
2 MHz at operating power levels between 100 and 1600 Watts.
JUNE 14th, 2005
The Center for Nanoelectronic Technology or more formally, the Fraunhofer-Center
Nanoelektronische Technologien CNT, is now open for business. The facility, located in Dresden, Germany, is run by the Fraunhofer
Society and two semiconductor manufactures, Advanced Micro Devices Inc. and Infineon Technologies AG.
Industry partners and a number of research and economic development
organizations have planned to further fund the facility with over 700 million Euros in the coming years. The facility, which
was officially opened on May 31, 2005, is equipped with a clean room for the development of 50 nanometer semiconductor process
technologies.
JUNE 13th, 2005
Carsem Doubling Test Operations in Response to High Growth Turnkey Test Trend
Carsem, one of the larger semiconductor test and package contractors has made plans to double
the size of its Malaysia manufacturing operations. According to Allan Calamoneri, Carsem's Vice President of Test Business
Development the expansion is related to the need for chip companies to reduce costs, "As a result of escalating pressure to
reduce cycle times and costs, we are seeing a tremendous increase in our customer's desire to outsource their wafer probe
and final test requirements. For example, due to several key customers' increasing demands, we recently added 50 wafer probe
systems along with the associated testers and expect to add another 45 final test systems by the end of this year."
Mr. David Comley, Carsem's Group Managing Director indicated that
the trend looks as though it will be sustained for some time to come, "The turnkey test services segment of our business is
growing at a significantly faster rate that any other segment and we see this trend continuing for quite some time. Carsem
is fully committed to providing our customers with the test infrastructure and engineering support services they require in
order for them to meet their competitive demands."
Carsem for its first phase expansion plans will increase the size
of its S-Site facility from 40,000 square feet to 66,000 square feet. By the end of 2005, the second phase expansion will
bring the total area to 96,000 square feet. After the expansion, the S-Site and M-Site, which is a 14,000 square foot test
operation, will bring the total area for semiconductor wafer probe and final test from 54,000 square feet to 110,000 square
feet.
JUNE 13th, 2005
Fab Owners Association Continues to Grow
The Fab Owners Association (FOA) reports that it has added three more members. These include
one of the largest flash memory chip producers, Spansion LLC, as well as two associate members, National Semiconductor, one
of the worlds largest analog chip companies and Applied Materials, a major player in the semiconductor equipment market.
The addition of these two Integrated Device Manufacturers(IDMs),
brings the total wafer production capacity represented by the Fab Owners Association up to 600,000 eight inch equivalents
per month. In terms of semiconductor revenue, the members of the organization represent over $9.7 billion in annual revenue.
FOA's announced members that have been announced previously include
AMI Semiconductor, Cypress Semiconductor, Delphi Electronics, Fairchild Semiconductor, Intersil, Jazz Semiconductor, LSI Logic,
Micrel Semiconductor, ON Semiconductor, Spansion, and ZMD AG.
JUNE 13th, 2005
Rockwell Selects StratEdge for High Speed Assembly
Rockwell Scientific Company (RSC) has selected StratEdge for the packaging and assembly of
its RTH050 track and hold integrated circuit. That chip is noted for its very high bandwidth and operating speed. According
to Rockwell, the RTH050 has a 15GHz bandwidth and a 1Giga samples per second dual track and hold circuit.
Emphasizing that the selection was a direct result of StratEdge's
high frequency packaging technology was Casey Krawiec, Director of North American Sales at StratEdge, "This is a prime example
of a customer taking advantage of our high frequency packaging technology. The engineers at Rockwell Scientific recognized
the superior performance of our packages and our high frequency assembly expertise. They needed a package that could meet
all of their requirements including electrical, environmental, thermal, and next level assembly -- and we delivered."
M.J. Choe, Manager of RSC's Mixed-Signal Product Engineering department
also commented on StratEdge's technology, "The StratEdge package handles the high speed and frequencies of our chip while
providing a leaded package that can be easily assembled to our customers' boards."
JUNE 8th, 2005
Reports through the NeST Group, a provider of a wide range of engineering
development services, indicate that a wafer fabrication facility in Cochin, India, is to be built. The facility has been planned
for the manufacture of memory chips to be used in mobile handsets and other types of consumer products. The roadmap for the
facility is in three phases. The first phase is for a design center, which is to employ 200, the second phase a test facility
in 2007 and the third phase is a 12 inch foundry, to be built in 2008. The total project was estimated to cost $1 billion
and has reportedly investors from the Middle East and Japan involved. The exact nature of the specific function or involvement
that the NeST Group had in the project was not disclosed. However, the NeST Group has plans to further expand its already
diverse operations in other areas. One of those areas is planar lightwave circuits for broadband communication applications.
The NeST Group provides product development services through the
NeST R&D Centre.
JUNE 3rd, 2005
New 3D Chip Packaging Technology to
Make Consumer Electronic Devices More Compact
Hitachi, Ltd. (NYSE:HIT)(TOKYO:6501) and Renesas Technology Corp.
have reported on a new stacked chip technology that reduces the package thickness of System in Package (SIP) products by over
60 percent. As a specific example, the package thickness of a two-layer SIP is reduced from 1.25 mm to 0.5 mm. For 10 LSI
chip layers, the new package technology permits a package thickness of just 0.5 mm.
Central to the technology is a through-hole interconnection process
that can be accomplished at low temperature, which is less than 50 percent of that previously required. The through hole electrodes
are formed on the back-side of wafers. Another feature of the technology is that it eliminates the need for wire bonding between
layers.
Details of the new technology are to be presented at the 2005 Electronic
Components and Technology Conference 2005 (ECTC 2005).
JUNE 2, 2005
imaging Technology international (iTi), a provider of equipment and tools to the industrial
ink jet market has completed a Series A funding round. Investors in the round included IKONICS Corporation and Severance Capital
Management. iTi presently offers a number of products for the ink jet market. These include a system used to measure and analyze
jet-able fluids used in print heads, a XY Materials Deposition System used in ink-jet process development, and a range of
large format printers. The company, which describes its growth as rapid, now sees a wide range of new markets its technology
can be applied to. According to Mr. R. Bruce Morgan, CEO of iTi, "iTi is well positioned to capitalize on the rapid adoption
of digital workflow in previously analog production processes in markets such as low-density electronics, flat panel displays,
pharmaceuticals and biotechnology. Our investor group understands industrial ink jet is a transformational technology that
will drive digital processes into strategic manufacturing operations at large industrial users worldwide."
Mr. H. Leigh Severance of Severance Capital Management added to
Mr. Morgan's statement, "Ink jet technology is well known in the home and office printing markets, but it is the belief of
iTi and the investment group that this technology has the potential to play an even larger role in transforming traditional
analog manufacturing processes by introducing digital workflow into industrial production. The Company has a proven track
record supplying Fortune 500 manufacturers with industrial ink jet development tools and production systems, and I view this
as a ground-floor opportunity to invest in an important technology that will change the way many products get built in the
near future."
iTi plans to introduce a second production system in the coming
few weeks for the production of photo quality labels and to print electronics and pharmaceuticals on flexible substrates.
JUNE 1st, 2005
SMIC Obtains $600 Million through China Development Bank
After political problems with a loan application in the United States, Semiconductor Manufacturing
International Corporation ("SMIC") (NYSE:SMI)(SEHK:0981) has announced that it has entered into a $600 million 5 year loan
agreement with a group of banks in China. China Development Bank and China Construction Bank were credited with the arrangement
of the loan, which involved a number of other banks. The loan is expected to be used for the construction of three 12 inch
wafer fabs to be built in Beijing.
MAY 24th, 2005
Dimatix has announced that it has opened its Silicon Valley headquarters,
complete with a Silicon MEMS fabrication facility and R&D center. The facility, which measures 33,000 square feet, will
be used for the production of MEMS devices designed for precision nanofluid applications. These applications include the printing
of nano-particles on not just only paper surfaces, as done with ink-jet printers, but on a number of different types of surfaces
such as flexible substrate surfaces. As well, the MEMS devices produced at the factory will be capable of more than spraying
out ink. From the nanonozzles of this new generation of MEMS devices will come nanometalic based fluids.
John Batterton, Dimatix CEO and President listed the broad base
of new applications for the new MEMS devices, "We are entering a new era in which the ability to jet functional fluid materials
will enable improvements to manufacturing a broad range of electronic, bioscience and other products. We are pleased that
Dimatix is leading the way with our materials deposition technology."
Andreas Bibl, President of the Materials Deposition Division and
CTO of Dimatix, elaborated on the capabilities of the new MEMS technology, "Because materials are deposited only where needed,
additive digital material deposition will change the way products are built, enabling micro-production processes that are
extremely cost-effective, much less wasteful and more economical in small production volumes. Low-cost, high volume, precise
printing of nano-particle fluids have many applications, and will help strengthen manufacturing of electronic circuits and
other products in the United States."
Dimatix, formerly Spectra Inc., has been focused on the production
of printheads for ink jet printing applications. The Dimatix Materials Deposition Division has dedicated its efforts to expand
the technology to applications such as low-cost, low-impact environmentally-oriented manufacturing - like the production of
electronic circuits, RFID tags, flat panel displays, circuit boards and bioscience products.
MAY 24th, 2005
Tomato LSI Selects DongbuAnam Process for LCD Driver Chip Production
Tomato LSI Inc. (TLSI) has selected DongbuAnam Semiconductor, the main foundry in Korea, for
the production of its Display Driver chips. The chips are planned to be produced with Dongbu's high-voltage 0.18 micron
process this month. According to the President of TLSI, Seon-ho Choi, the chips will be used to drive video displays in cellular
phone applications. From the third quarter of this year, somewhere between 2,000 and 3,000 eight inch wafers per month will
be produced for TLSI, according to the Executive Vice President of Dongbu, Jae Song.
Tomato LSI, founded in 1999, is considered one of the fastest growing
companies in Asia.
MAY 23rd, 2005
New Snap On Technology to Lower Cost of Wafer Fab Construction
Patented technology from a Canadian company, PowerTech Inc., (TSX-V: PWB), will soon be used
to help build a number of new facilities in Quebec. At these construction sites will be PowerTech's PicBucket, an excavation,
backfilling, demolishing, and compaction machine. The machine, which PowerTech reports reduces the costs of excavation up
to 50 percent, permits the use of interchangeable tools that perform a variety of small and large construction jobs.. Some
of the PicBucket interchangeable options include shovel like instruments, compaction plates, backhoes, demolition devices
and an assortment of blades.
Carol Murray, CEO of PowerTech discussed the benefits of the product
in the context of costs, construction time and the effect on traffic congestion, "We are confident that these construction
sites will benefit greatly from the significant productivity advantages offered by our technology. The power and versatility
of our bucket can often cut excavation time in half. This performance translates into economic and social returns through
reduced construction costs and a shorter period of inconvenience for communities where the work is being carried out, particularly
with respect to traffic congestion. Moreover, during a demonstration we conducted on May 6 in Trois-RiviGeres for members
of the Association professionnelle de l'outillage des municipalitDes du QuDebec, we were pleased and proud to see to what
extent our technology made an impression. And it was that much more satisfying because those on hand were experts in the field."
In the ever-hurried semiconductor industry, where time-to-factory
yield is always important, the use of PicBucket may prove critical to increasing market share during high-revenue market windows.
MAY 23rd, 2005
Production Costs for Dendrimer Nanostructures May Drop Soon
Dendritic NanoTechnologies Inc. (DNT), a nanomaterials company reports that it has developed a new
process that may reduce the production costs of dendrimer nanostructures, critical for a number of pharmaceuticals, medical
imaging, electronics, and materials applications.
DNT's new dendrimer technology, it labels the Priostar family,
are derived from kinetically driven chemistry, which is based on polyfunctional branch cell reagents. DNT states that this
approach could result in substantial cost reductions, "Preliminary studies show a cost reduction of between two to three orders
of magnitude." Other technology benefits alluded to include the ability to scale the process and the capability to mass produce
precision nanostructures with consistently repeatable specifications.
Robert Berry, DNT's CEO, indicated that the company's technology may have
the potential to change the dynamics of the entire nanotechnology market all together, "Our new Priostar dendrimers, as nanoscale
building blocks, radically change the current economics of nanotechnology. They place DNT in the enviable position of controlling
a dominant nanoscale platform with many applications in multiple billion-dollar markets. This new technology is a potentially
disruptive technology since it will establish a new price point for an essential technology. Furthermore, Priostar extends
DNT's patent estate while accelerating commercialization of our dendrimer technology."
DNT also implied that the technology will put in reach the possibility
to economically meet strict Food and Drug Administration standards for biomedical applications, which require precision, scalability
and reproducibility.
Offering further explanation of the company's advancement in nanomaterials
manufacturing was Dr. Donald Tomalia, Chief Technical Officer at the company, "It takes approximately eight steps and one
month of processing time to create Generation 3 of a PAMAM generation. In contrast, Generation 3 of a Priostar dendrimer can
be created in three steps and just a few days. Our new dendrimer process also vastly reduces the amount of labor and reagents
normally required by the PAMAM process. An exciting and new feature of the Priostar family of dendrimers is the ability to
add extenders or functionality to the interior of the dendrimer to customize interior spaces and reactivity. These features
give the Priostar dendrimers customizable encapsulation properties that allow for greater flexibility to tailor a solution
for our customers."
MAY 23rd, 2005
Dowa Mining to Produce Nitride Materials
and Wafers for Gallium Nitride Applications - Hybrid Vehicles Mentioned
Unsubstanciated reports indicate that Dowa Mining Co. plans to start
mass production of nitride semiconductor materials in its fiscal 2006 year and Gallium Nitride (GaN) epi in the year 2007.
Integrated circuits based on such materials are expected to be used in inverters for hybrid automobiles and buses. Dowa expects
to generate over 10 billion yen on sapphire substrate GaN wafers in its fiscal 2008 year with an initial investment of 5 billion
yen.
MAY 23rd, 2005
Stone Pillar Reduces Test Plan Time 90 Percent
With its EDA market plan, Stone Pillar Technologies, Inc. has opened up the doors to the test
plan market. The company has just reported that National Semiconductor (NASDAQ: NSM) , one of the world's leading analog
and mixed signal semiconductor companies, has adopted its TestPlanManager for the automation of test flows.
According to Mark Poulter, electrical test manager at National Semiconductor's
Advanced Process Technology Development Group, National reduced the engineering time for the test flow creation time
from a week to just a half day. Besides the 90 percent in test development time saved, he noted a number of other benefits
that test engineers can appreciate, "TestPlanManager speeds the development of test flows and reduces errors by
automating many of the steps that previously had to be painstakingly implemented by hand. Skilled test engineers can
now focus on real technological challenges rather than on the administrative tasks of manual data entry that do not add value
for technology development."
Besides the automation of the test flow creation process, TestPlanManager
also earns credits with its ability to target the test plan for any one of a number of automated test equipment (ATE) platforms.
MAY 19th, 2005
Driven by a market that sees SOI process technology as an answer
to high power consumption for high speed consumer electronic products, Soitec (Euronext Paris), on top of a recent $100 million
plus purchase agreement, has reported a 57% percent increase in its 2004 - 2005 annual sales. With its annual financial release,
the SOI wafer suppler also reported a 248 percent sales increase of its SOI based 300 mm wafers - indicative of the popularity
of SOI for the latest generation of chips.
Soitec, which specifically noted microprocessors and automotive
markets as two growth catalysts, reported that overall sales for its 2004 - 2005 fiscal year came in at 138.9 million Euros,
up 57 percent from last year's 88.1 Euros. 300 millimeter wafer sales reached 42.1 million Euros, or 32 percent of total sales
compared to just 14 percent of sales in the 2003 - 2004 fiscal year.
The company projects that growth rates are expected to be higher
than 40 percent. In support of that projected growth rate, Soitec points to a $100 million purchase multi-year agreement for
300 millimeter SOI wafers, which is expected to unfold between July 2005 and June 2006, and to its multi-year supply agreement
of 200 millimeter and 300 millimeter wafers to leading microprocessor provider, AMD.
Soitec's latest advanced technology also has done well. The company
noted 4.2 million Euros in Picogiga related revenues, up 16.4 percent. Picogiga International, a unit of Soitec, develops
high performance transistor technology based on new materials technology. These transistors, according to researchers at Triquint
Semiconductor, a United States based GaAs chip company, have an output power density of 7 W/mm at 10 GHz.
MAY 19th, 2005
ChipMOS Furthers Ties With Himax
ChipMOS TECHNOLOGIES LTD. ((NASDAQ:IMOS) announced its subsidiary ChipMOS Technologies, Inc.,
based in Taiwan, will extend its assembly and test services to Himax Technologies, Inc. until the end of 2008. Under the agreement
ChipMOS will increase the number of LCD Driver chips it will package.
Himax , also based in Taiwan, is a fabless semiconductor company
that focuses on driver technology for displays used in a variety of consumer applications. Founded in 2001, the company employs
about 350.
MAY 18th, 2005
Agilent's Reports on Chip, Test and Life Science Revenue
Agilent with the release of its quarterly earnings report for the three months ended April
30, 2005, its second quarter, reported individual results for its semiconductor, automated test equipment, and life sciences
operations.
Agilent for its most recent second quarter, reported Semiconductor
Products' orders of $464 million, up 5 percent from the same quarter a year ago, and up 22 percent sequentially. The book-to-bill
ratio for semiconductors also reached 1.12, which represented an increase from 0.97 for the year ago quarter and 1.00 in the
first quarter of its 2005 year.
Within the semiconductor group, orders for personal systems components,
which include optical mice and handset components increased 2 percent over last year levels. Networking systems components
also increased. They were up 11 percent over last year. In the network area, Agilent indicated that fiber optic and storage
components were a major component of the gains. Overall in the semiconductor group, total revenues were $414 million, down
8 percent over the year ago quarter and up 9 percent from the first quarter in 2005.
In the automated test equipment (ATE) area, where the company sells
into the semiconductor market, orders reached $171 million, up 7 percent over the first quarter in 2005 and up 25 percent
above the fourth quarter of Agilent's 2004 fiscal year. However the company reported that despite the gain, the recent quarter's
orders were down 40 percent from the same quarter a year ago. In the test area, Agilent indicated that sequentially, flash
memory and parametric test orders were down, but system on chip (SOC) and manufacturing test orders were up. ATE revenues
reached $181 million in Agilent's second quarter, up 17 percent sequentially, but down 32 percent year over year. Agilent
expects that the industry will recover in the second half. One reason is customer acceptance of its new SOC, flash and manufacturing
test products.
Life Science orders, which include Agilent's microarray chips, increased
17 percent in the latest quarter.
MAY 17th, 2005
MTBSolutions and MemsTech Form Foundry Services Unit
MTBSolutions and MemsTech have united to offer MEMS foundry and technical design services to
the North American market. As part of the agreement, MTBSolutions will offer technical and market support for foundry and
packaging services from MemsTech.
According to Mark DiOrio, CEO at MTBSolutions the agreement will
help small fabless MEMS companies compete, "North American customers now have access to cost effective high volume MEMS device
manufacturing complemented by highly experienced engineering and customer support. Smaller MEMS companies with well differentiated
technology can now compete effectively against larger scale companies who own their own fabs and assembly operations."
Mems Technology, a public company based in Malaysia, and MTBSolutions,
a private company based in San Jose, California will together offer technology expertise in the design and manufacture of
pressure sensors, silicon microphones, thermopile arrays, thermal cameras and low G accelerometers. MemsTech's foundry gives
fabless customers access to 0.6 micron CMOS MEMS technology, bulk and surface processes, and wafer to wafer bonding. MTBSolutions
is noted for its MEMS and integrated circuit package technology.
MAY 16th, 2005
CSIP and HiJian to Provide Low Cost Production for China's Chip Market
The China Software and Integrated Circuit Promotion (CSIP) Center has entered into an agreement
with HeJian Technology (SuZhou) Co., Ltd, to help reduce the cost of integrated circuit production and design. The two organizations
will cooperate in a program that will provide Multi Project Wafer services and technical support to China's growing semiconductor
industry.
MAY 12th, 2005
MCT, an IC Test Company, Receives $2.5 Million
Micro Component Technology,
Inc. (OTCBB:MCTI), a semiconductor test equipment company, announced it has received $2.5 million from Laurus Master Fund
Ltd. The financing was secured with a long-term convertible note. MCT's Chief Executive Officer, Roger E. Gower, indicated
that the financing will be used to win over new customers, "This additional financing with Laurus, together with our recent
actions to eliminate approximately $1.5 million of annual expense, affords us the needed liquidity to meet our financial needs
in these difficult markets, and to pursue recent customer opportunities associated with our Strip Solution product family."
MAY 11th, 2005
JMAR's Water Quality
System Used at Beverage Company - Potential Applications For Wafer Fabs
JMAR Technologies, Inc. (NASDAQ: JMAR), a microelectronics company
that has diversified into new applications based on related technology, will deliver and install its microorganism testing
system to Kimpen, S.A. DE C.V. of Merida, Mexico. Kimpen, a beverage company, will test the product for two months, and then
based on the test results will determine if the system will become a part of its Yucatan Peninsula factories. The final total
order, if all tests go well, will include 17 BioSentry real-time microorganism early-warning monitoring systems.
Ronald A. Walrod, CEO of JMAR stressed the need for water quality
consistency at beverage facilities, "In an operation of Kimpen's size, consistency of quality is a critical and challenging
benchmark. We believe that by providing the means for continuous monitoring for microorganisms and integrating detection data
into their centralized purity control system, we can help Kimpen maintain the highest standards of purity throughout its production
facilities."
JMAR has already been successful in the market with test installations
of its BioSentry system. Olivenhain Municipal Water District reported that it will use three BioSentry systems to monitor
the quality of water flowing into and out of its water system.
MAY 10th, 2005
STMicroelectronics and Hynix Begin Construction of Joint 300 mm Wafer Fab
in China - to Produce Memory Chips
Hynix ST Semiconductor Ltd., the new name of the China based joint wafer fab venture between Hynix Semiconductor and
STMicroelectronics, is under construction and is scheduled to begin production in 2006. The facility will eventually include
two fabs, one 8 inch and one 12 inch, for the manufacture of DRAMs and NAND flash memory. The 8 inch DRAM facility will be
the first to come on line, in first half of 2006, followed by the 12 inch NAND flash fab in the second half of 2006. The total
initial investment in the operation comes with a price tag of $2 billion. Hynix will own 67 percent of the facility and STMicroelectronics
33 percent.
Unsubstantiated reports indicate that the DRAM facility will initially produce 20,000 8-inch wafers per
month and the NAND flash facility will produce 17,000 wafers per month. Packaging and test are also to be conducted at the
site.
MAY 9th, 2005
Raymor Industries Inc. (TSX-V: RAR), a company that has developed
a manufacturing and environmentally friendly single-walled carbon nanotube (C-SWNT) technology, announced that it has begun
production. The company projects that revenue from C-SWNT production will reach CDN $1.0 million in the next 12 months, CDN
$5.0 million in 24 months and CDN $10 million in 36 months. Production capacity, measured in grams, is expected to reach 10,000
grams per day in the next 12 months.
The inventors of the process commented on the new applications of
the technology, as well as the historical significance of the technology. Dr. Frédéric Larouche said, "Our product is beneficial
for uses in numerous applications, including new generation batteries, semiconductors, nano-composite materials, or in the
biomedical field. " Dr. Olivier Smiljanic stressed the historical importance of nanotubes, "The impact of nanotubes in today's
society will be more important than the arrival of the transistor." The semiconductor industry, founded on transistor technology
over 50 years ago, is now a $200 billion a year industry.
MAY 9th, 2005
FormFactor, Inc. (NASDAQ:FORM), a microspring based wafer probe
card maker, has announced its latest wafer probe card for the SoC flip chip market. For these applications, FormFactor has
introduced the BladeRunner 175 (BR175) Multi-DUT (Device Under Test) wafer probe card. The company indicates that the BladeRunner
reduces semiconductor company's total cost of test. Part of the reason is that the card has 10,000 probes enabling the test
of four-DUTs, which the company states is at least double the DUT capacity of the most advanced wafer probe product currently
available. Additionally, the re-sort rate is minimized and wafer sort yield is said to be improved.
FormFactor gained significant market share in the wafer probe card
market in a relatively short period of time. The company's success is attributed to its micromachined (MEMS) microspring technology,
which is fundamental to the design of its wafer probe cards.
MAY 9th, 2005
eMagin Corporation (AMEX:EMA), with the announcement of preliminary
financial results for its first quarter ended March 31, 2005, indicated that its plans to significantly increase its monthly
output of microdisplay devices. The company states that it anticipates that its average output to go from 1,000 to 2,000 units
per month in 2004 to 15,000 to 20,000 units per month in 2005.
Gary Jones, CEO at eMagin discussed at length about the revitalized
production capacity and the company's OLED-on-silicon based products, "I'm pleased to report that we believe that we've completed
the first phase of the critical step of updating our Hopewell Junction fabrication facility to accommodate the much higher
output levels we anticipate requiring this year. With production resuming in May we've initially restarted the line to accommodate
moderate throughput. We anticipate that we will generate between $1.0 million and $2 million of revenue during Q2, ramping
production output upward throughout the remainder of the year. Our first shipments of microdisplays from our consumer OEM
backlog are now occurring and we are projecting initial shipping availability of our first commercial Z800 3D Visor units
to begin by the end of the quarter. Our Z800 3D visor combines our easy to view OLED-on-silicon technology with our new large
view lenses, head-tracking capability, flicker-free 3D stereovision capability, built-in noise canceling microphone, hi-fi
sound, and low power USB compatibility. The effect is equivalent to viewing a 105-inch screen at 12 ft, but with an image
that moves as your head moves to completely surround you with a screen. The product continues to receive outstanding reviews
from press, partners, and prospective customers and we believe will be one of the more eagerly anticipated new products of
2005."
eMagin also reported preliminary estimates of its revenue for the
three months ended March 31, 2005. For that period the company reports $0.7 million in revenue, compared to $0.5 million in
the first quarter of 2004 - an increase of 28 percent.
MAY 6th, 2005
X-FAB Semiconductor Foundries AG reported that its 2004 revenue
reached Euro 142.4 million, up 27 percent from 2003 levels, which were Euro 112.0 million. Quarterly income was also up 22
percent year over year. Weighting on the performance was the U.S. dollar, which over half of the company's sales are purchased
with.
X-FAB, based in Erfurt, Germany, employs about 1,000. The company
operates three manufacturing facilities for the production of integrated circuits. These facilities are in Germany, the United
Kingdom and the United States. The company specializes in foundry work for mixed signal and analog integrated circuits based
on CMOS and BiCMOS processes for automotive, communications, consumer and industrial applications.
MAY 4th, 2005
TSMC Schedules 65
Nanometer Process Technologies, 750 Billion Transistors Per Wafer
Taiwan Semiconductor Manufacturing Company (NYSE:TSM) (TSE:2330)
has said it expects wafers based on its 65 nanometer semiconductor manufacturing process out in December of 2005. Called the
65 nm Nexsys Technology, the process will allow transistor density levels near twice that of its 90 nm technology. A 12 inch
wafer, which the chips are fabricated onto, in all, will have to the capacity to hold over 750 billion transistors.
Companies such as Altera have already received prototypes of chip
designs based on the technology. As well, TSMC expects tape-outs of designs based on the technology in the second half of
2005. The first 65 nm production process, which is optimized for low power, will be followed with a high-speed process in
2006, then a generic 65 nm process later in 2006. In 2007, a Silicon-On-Insulator (SOI) 65 nanometer process version will
be offered.
APRIL 28th, 2005
FEI Commercializes High Resolution Microscope - On
to 0.5 Angstroms
FEI, a company that is well-established in the semiconductor equipment market, has introduced
what the company believes as the “World's Most Advanced Electron Microscope.” Called the New Titan TEM, the microscope
or nanoscope has a resolution below 0.7 Angstrom. The company indicates that 0.5 Angstrom is one third the size of a carbon
atom.
The acceptance of the new product has gone well according to George
Scholes, General Manager of FEI's (S)TEM business line, "The initial market response for this advanced technology has been
very strong. For wide commercialization of this technology we designed the base system with a superior level of upgradeability
so customers can add an aberration corrector, on site at a later date. This will enable customers to obtain resolution and
capability they need today, knowing that they can expand the system's resolution limits as their requirements change."
FEI is presently engaged in the development of microscopes with
even greater resolutions. The company as part of its resolution revolution is teamed through a multi-million dollar project
with several regional United States laboratories. The goal of the resolution revolution project is to obtain 0.5 Angstrom
resolution.
APRIL 21, 2005
As a signal that STMicroelectronics is well established as a provider
of 90 nanometer based technology, the company indicates that it has implemented, verified and fabricated its MIPHY (Multi-Interface
PHY) Physical Layer interface IP Core with 90 nanometer process technology. The milestone prepares the company for the migration
of all its SoC products to 90 nm from 130 nm later in the year.
The MIPHY macro-cell solution permits one disk drive chip to support
multiple types of disk drives, enabling disk drive companies to eliminate the need to carry inventories of different types
of disk controller chips. The macro-cell supports Fibre Channel, PCI Express, SATA and SCSI interface standards. The design
also includes a Time-Base Generator based on a harmonic Phase Locked Loop (PLL). The PLL has a jitter specification of less
than 2 picoseconds with high noise rejection.
APRIL 20th, 2005
Soitec (Euronext Paris), one of the world's leading suppliers of
Silicon On Insulator (SOI) technology, and a bell weather of the acceptance of SOI semiconductor process technology, announced
sales of 40.6 million Euros for the fourth quarter of its 2004 to 2005 year. For the total year sales were 138.9 million Euros
representing a 57.6 percent revenue growth over last year. Fourth quarter sales grew 56.0 percent over last year's fourth
quarter. For last quarter, the third quarter, sales were 31.9 million Euros.
For next year the company has projected sales to increase 40 percent
in dollars. With its report the company also noted the technical achievements of its joint development agreement with Freescale
Semiconductor, Inc. The two companies have developed strained SOI devices that offer a 70 percent increase in electron mobility,
which gives the companies the capability to manufacture at the 45 nanometer level.
APRIL 18th, 2005
SOI CMOS Process with MEMS Integration is commercialized
at Cypress Semiconductor Facility
American Semiconductor, Incorporated (AMI), known for its foundry services, has entered
into an agreement with Cypress Semiconductor Corp. (NYSE:CY) operating unit, the Silicon Valley Technology Center (SVTC) to
commercialize AMI's FlexFet advanced Silicon-on-Insulator (SOI) CMOS wafer fabrication process. The FlexFet process offers
dynamic threshold control, the capability to support different dielectrics, metal gate materials and 3D structures such as
MEMS devices. The process is radiation resistant and operates at low power with voltage supply levels far below one volt.
Doug Hackler, Founder and President of ASI commented on the agreement, "By perfecting
our technology at SVTC, ASI is able to resolve fundamental limitations of CMOS for next-generation scaling of advanced microelectronics.
We are also able to cost-effectively move our business forward and more aggressively pursue and support our customer base."
Bert Bruggeman, SVTC's Managing Director indicated that R&D costs often play a
role in the selection of his company's process development and manufacturing services, "As R&D costs continue to rise,
companies with emerging technology development needs, capital equipment manufacturers and materials suppliers are challenged
to cost-effectively migrate their products and processes from prototype to manufacturability. Our work with ASI is an example
of how to overcome those challenges and allows ASI to realize a significant R&D cost savings while rapidly commercializing
its advanced process technology."
As part of the agreement SVTC's 200 millimeter wafer fab will be used to meet current
Flexfet demand and prototype production. Production is planned to take place at Cypress' Bloomington, Minnesota
facility. ASI's technology is expected to be eventually offered at the 0.13 micron and 90 nanometer resolution levels.
APRIL 18th, 20005
Micro Linear
Selects Jazz Semiconductor as SiGe Foundry for PHS Chip
Micro Linear (Nasdaq:MLIN) has selected Jazz Semiconductor to manufacture its ML 1900
Personal Handyphone System (PHS) Transceiver, which is targeted at the fast growth PHS market in China. According to reports
from Micro Linear, there are currently over 60 million PHS subscribers. Of those 60 million, 25 million were added in 2004.
Brent Dix, VP Engineering at Micro Linear seemed to indicate the product and foundry
agreement could be pivotal, "We are expanding our market with the introduction of our ML1900 PHS product and we believe a
reliable foundry partner is key to our success in this segment. We are poised to achieve our desired results as Jazz has proven
to be an excellent partner in our previous relationship for the ML5800, the industry's first 5.8GHz single-chip FSK transceiver."
Paul Kempf, CTO for Jazz Semiconductor also commented on the agreement, "With our
SBC35 offering, we allow aggressive companies such as Micro Linear to take advantage of a modular, low-cost, proven process
platform to meet their time-to-market needs quickly and cost effectively, We believe that collaborative partnerships between
a foundry and its customers are key to the timely, efficient launch of complex, innovative products. We look forward to an
ongoing, successful partnership with Micro Linear."
APRIL 18th, 2005
Singapore Goes After China's Young Fabless Market Through Silicon Federation Inc.
United Test and Assembly
Center Ltd (UTAC) has entered into a tentative test and supply agreements with several of China's emerging fabless companies,
which belong to the Silicon Federation Inc (SFI). The apparent motive is to grow with these companies as China's fabless market
share heads towards a world leadership position, eventually, perhaps, competing head to head with the now dominate United
States. The list which includes a number of start-ups include Advanced Microsystems Technology Ltd., Chiphomer Technology
Ltd, Fremont Micro Devices Ltd, Inspired Motion Ltd., LiteMagic Ltd,, Sanguine Microelectronics Corp, SourceCore Technology
Inc, Teralane Semiconductor Ltd and Wearnes Semiconductor.
These companies have operations
in almost every segment of the semiconductor market. Lite-Magic addresses the complex color LED controller market with a set
of animating and decorative LED lamp controllers. Its products are focused towards the display, decorative lighting, advertising
and toy markets. Fremont Micro Device offers serial EEPROMs, which range in density from 1 Kbits to 256 Kbits. SourceCore
Technology Inc., founded in 2002, develops RF / Mixed signal SoCs for ISM band transceivers for HAN / PAN electronic products.
Chiphomer Technology Ltd. is involved in the IC design, IC distribution and software and hardware design services market.
As a fabless semiconductor company it provides power management and VoIP chips. Wearnes Semiconductor is involved in the integrated
circuit market through a group of affiliated companies that are known as the Wearnes IC Federation. Chrontel, a company with
over 100 employees, is a IC Federation company with major operations in the United States. Chrontel is involved in the PC
video chip market.
APRIL 8th, 2005
Tower Semiconductor Ltd. (Nasdaq:TSEM) (TASE:TSEM) and QuickLogic
Corporation (Nasdaq:QUIK) have revealed that Quicklogic's Eclipse II family of uWatt FPGA chips are manufactured with Tower's
0.18 micron, six layer metal CMOS process. The process, as well as the design, resulted in a standby current for the programmable
chip in the order of 14 micro amperes.
Tom Hart, QuickLogic's Chairman, President and CEO expounded on
Tower's FPGA low-power foundry capabilities and the target market for the FPGAs, "Tower's advanced technology platform, supported
by excellent customer service, combined to give our products a competitive edge for applications where every micro-Watt counts,
QuickLogic's uWatt FPGA and uWatt Programmable Bridging products are gaining significant traction in the portable application
space. Additionally, the devices' support of the industrial temperature range makes them ideally suitable for rugged working
environments, where active cooling systems or heat sinks are not feasible due to reliability or form factor requirements."
Doron Simon, President of Tower Semiconductor USA, Inc. added, "The
move to Tower's 0.18-micron process, as well as the intense engineering collaboration between our companies enhanced the product's
low leakage, low power characteristics. Tower's 0.18-micron technology platform has enabled QuickLogic to ramp production
of an optimized set of programmable products, opening up new high volume market opportunities for both companies."
FPGAs are considered one of the most difficult types of integrated
circuits to manufacturer. Few companies possess the know-how to fabricated FPGAs with high yields, let alone low-power operating
characteristics.
MARCH 31st, 2005
With 1st Silicon's completion of the pre-production steps for three
color photoreceiver cells, UniqueICs LLC of Russia, a subsidiary of Kedah Wafer Emas (KWE) of Malaysia, should have its three
color image sensors on the market soon. Now that the final phase of the design is complete, 1st Silicon plans to manufacture
the technology on its 0.25 micron standard CMOS mixed signal process. UniqueICs now offers samples of 1.3-Megapixel sensors
and plans volume production in the springtime. 3 Megapixal to 10 Megapixel products are expected later as product process
migration continues.
UniqueIC is a fabless semiconductor company with an emphasis on
optoelectronics. The company, which is headquartered in Zelenograd, has over 130 employees.
MARCH 24th, 2005
Straatum Brings Preventive Yield Analysis Tools to Semiconductor Fab and Foundry
Market
Straatum
Processware Ltd., which has recently received funding from Intel Capital, ACT Venture Capital and Vision Capital, has introduced
its Imprint MX2 manufacturing fault detection system. This system, which extracts information in real-time from an array of
radio frequency and optical sensors located in the wafer fabrication line, allows wafer fabrication managers to quickly predict
where and when manufacturing induced product flaws are most likely to occur. The system, complete with a portable fault library,
has been designed to enable companies to alter process technology and locate semiconductor equipment that’s drifting
out of specification, before integrated circuit yield is affected. Such prediction capabilities are enhanced with the MX2’s
data mining features that allow for the quick classification of fault types and quick retrieval and analysis of the endless
flow of real-time data that a wafer fabrication plant generates and needs to collect and store.
MARCH 23rd, 2005
Phoseon Technology, Inc., a company founded by executives from the
semiconductor industry, has landed $6.4 million in a Series B funding round for a new light source technology, which is expected
to simplify and improve the semiconductor wafer fabrication process. The company indicates that mercury arc lamps and lasers,
in use for over 40 years in the semiconductor industry, will no longer be necessary because of its technology. To replace
mercury lamps and lasers, the company has developed a solid-state technology, which generates very high intensity ultraviolet
or infrared light emitting arrays to be projected "uniformly" over a large area. So far the company has been able to
successfully penetrate key accounts in not only the semiconductor inspection and lithography industry, but also in the CDs/DVDs
and industrial printing industries. The technology, in addition
to lithography applications, can be applied to the drying of inks, adhesives and coatings. According to Kevin Gabelein, Managing
Director with Fluke, "Phoseon's technology is unique in this space and has horizontal applicability across a variety of industrial
markets. Phoseon's ability to land key beachhead accounts with leaders in each sector made us believe in their significant
growth potential."
Investors in the round included Fluke Venture Partners, SmartForest
Ventures, PacRim Ventures, Capybara Ventures, Moritex, and investors from Phoseon's end markets.
MARCH 22nd, 2005
Agilent Ventures is a natural place to look for companies that want
funding for semiconductor test technology. And that's exactly where Pintail found part of the $7 million it secured in its
Series B venture capital round. Agilent Ventures, a business unit of Agilent Technologies, Inc. - a company with major operations
in semiconductor test equipment and electronic test instrumentation, participated in the round along with Austin Ventures,
Duchossois Technology Partners, IVF Ventures and STARTech Early Ventures.
Pintail was well received partly because of its performance in the
start-up phase and its list of world leading semiconductor customers. Phil Kirk of Duchossois Technology Partner noted, "Pintail
is distinguished by the companies it has engaged with during its development phase. Companies like Texas Instruments, Qualcomm,
STMicroelectronics and STATSChipPAC represent some of the most demanding semiconductor leaders in the world. The conflicting
needs for higher levels of quality in markets like automotive combined with lowering cost of test in all consumer products
are major challenges to the semiconductor industry. Pintail has developed innovative solutions to these challenges."
Pintail apparently has been able to win over customers because it
is able to save its clients significant amounts of money. Semiconductor test, because of the increased density and functionality
of integrated circuits has steadily risen over the years, and is something most CFOs at semiconductor companies would like
see substantially reduced. Pintail with its test operations software is able to reduce the amount of time it takes to test
a chip - in the order of 30 percent. This translates into over 30 percent per more chips per day through the factory - which
in some cases allows millions more chips per day to make it to the awaiting Fed Ex jet.
Pintail's software, because it is platform independent, and offers
real time data acquisition, and uses existing test equipment with only minor edits in test programs, allows these companies
to reduce test costs quickly without a significant capital investment - all of which pleases the company accountant. Taylor Scanlon, Pintail's president and CEO brought home the point, "Investment
in semiconductor test has taken a back seat to improving fab efficiency, especially in recent years. We are very pleased to
be backed by these world-class investors in our quest to bring true innovation to test. Our value proposition is obvious when
we hear that our customers are receiving significant benefits in every key area of concern in the test environment."
MARCH 21st, 2005
Sumitomo
Mitsubishi to Double 300 mm Wafer Capacity
As a sign that indicates that 300 mm wafer technology will soon be
the main stream wafer size, Sumitomo Mitsubishi Silicon Corp. announced that it will double its 300 mm wafer production from
300,000 wafers per month now to 600,000 a month by the summer of 2008. The capacity expansion is expected to cost 80 billion
Yen.
MARCH 16th, 2005
Atmel Adds High
Voltage Option to SOI Foundry Service
Atmel announced that the
availability of a BCD - on - SOI foundry process for its customers. The Smart Power technology is based on a 0.8 and 0.5 micron
CMOS process and includes DMOS transistors with ratings up to 80 volts. End markets for this process include DSL driver chips
and plasma display drivers. The process will also include 120 volt DMOS transistors and an EEPROM memory option by the end
of the year.
MARCH 16th, 2005
Toshiba and Sandisk Complete Environmental Friendly Wafer Fab
Toshiba and Sandisk plan
for their environmentally friendly wafer fabrication facility to enter the production phase in the second half of calendar
year 2005. The cost of Fab 3 is expected to rise to 270-billion yen by the end of March 2007. The fab has been designed to
reduce the carbon dioxide and perfluorocarbons from its clean room in the order of 30 percent over the levels of Toshiba's
current 200 millimeter wafer clean rooms. The investment costs are shared by Toshiba and Sandisk through their joint venture,
Flash Partners, Ltd.
The facility, which was
officially opened in late February, called Fab 3, is to produce NAND flash memories on 12 inch (300 millimeter) wafers. By
late 2005, the facility is expected to produce 10,000 wafers per month. Plans are to ramp the facility to 40,000 wafers per
month by the first half of 2007. The facility has been designed so that it would eventually be able to have a capacity of
62,500 wafers per month.
Initially the wafer fab
will produce wafers based on a 90-nanometer (nm) process technology then in the first half of 2006 move to 70 nm and then
go all the way down to 55 nm in late 2006. NAND flash based on 70 nm technology is scheduled at the existing Yokkaichi 200
millimeter wafer fab in 2005.
Justifying the investment,
Mr. Masashi Muromachi, Corporate Vice President of Toshiba Corporation and President & CEO of Toshiba's Semiconductor
Company, indicated, when the plant opened, that the NAND Flash market is expected to see an annual growth rate of 30 percent
between 2004 to 2008 and is expected to grow from a 700 billion yen market to 2,100 billion yen market.
The site area of the facility
is 24,300 square meters, with a floor area of 113,000 square meters and a clean room area of 34,500 square meters. The site
is located at Toshiba's Yokkaichi Operations, which has served as the primary wafer fabrication manufacturing center for Toshiba
since 1992. The address there is 800 Yamanoisshiki-cho, Yokkaichi-shi, Mie Prefecture, Japan. The Yokkaichi Operations has
about 1,950 employees, a total area of 312,000 square meters and a building area of 180,000 square meters, which does not
include the 24,300 square meters of the new Fab 3 facility. The facility in 2005 is managed by the General Manager Jiro Ooshima.
MARCH 7th, 2005
Indium Phosphide Foundry Services Now Available
Indium Phosphide chips, which
lately has been a popular investment of venture capitalists, can now be made to order through the foundry services offered
by Avanex. Avanex offers Indium Phosphide (InP), Gallium Arsenide (GaAs) and Lithium Niobate (LiNbO3) technologies.
The company has over 15 years
experience in the manufacture of InP based chips and also offers an array of off-the-shelf InP based optoelectronic semiconductors.
These chips, which are used in medical, instrumentation and telecommunication applications include Fabry-Perot and distributed
feedback laser chips, monolithically integrated electro-absorption modulator laser (EML) chips, pump laser chips and photodiode
chips. Avanex's PowerBright line of integrated circuits are used for Dense Wavelength Division Multiplexing (DWDM) and Time
Division Multiplexing (TDM) applications.
MARCH 7th, 2005
Pericom Elects Outsourcing to Reduce Costs
Pericom Semiconductor is one more company that has elected the outsource option as part of its business model. The company
says that it will reduce its workforce by 25 employees as a result of a cost reduction program. The cost reduction program
is expected to save $1.2 million. Part of the savings are expected to be obtained through an increased reliance on outsourcing
to Asian subcontractors. The company also noted that savings were also expected as a result of the SaRonix acquisition, which
was acquired in 2003. Overlap in operations and hence costs often take time to eliminate after an acquisition.
FEBRUARY 28th, 2005
eSilicon Continues
its Revenue Growth – Reports Tripling of Sales
eSilicon Corporation, a one-stop design and manufacturing
semiconductor house, announced that for its fiscal third quarter it had revenue of $27 million compared to $9 million in the
same period last year. The company also noted expanded profitability. eSilicon credits its success to its general contractor
model. Under that model, the company discerns which wafer and package foundry and semiconductor process will provide the lowest
cost and best performance given the constraints of a given chip design.
FEBRUARY 24, 2005
China Foundry, ASMC,
Gets Approval for IPO
Reports out of China have indicated that Advanced Semiconductor
Manufacturing Corporation (ASMC), a major integrated circuit foundry in China,
has been given approval for an initial public offering (IPO). The company hopes to list in the first quarter of 2005 and raise
about $150 million dollars.
FEBRUARY 15th, 2005
IC Test Foundry Sees Sequential Sales
Increase
ASE Test Limited, a contract test chip company, or test
foundry, reported a sequential and year over year gain in revenue. Because the company’s revenue are indicative of the
health of its customers, primarily fabless and IDM based semiconductor companies, the increase in revenues signals that the
IC market may be on track for a firm recovery in 2005. ASE reported a 2.8% sequential gain and a 9.2% year-over-year gain.
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FEBRUARY 15th, 2005
Taiwan Semiconductor
Manufacturing Co. (TSMC), contrary to earlier predictions of a fall in revenue, reported a sequential and year-over-year gain
in revenues. For January revenues rose 4.6 percent over December. January sales totaled 20.84 billion dollars. January over
January sales increased 8.8 percent. Request More Information - Specify
Company, Product, Etc.
FEBRUARY 11th, 2005
SMIC,
China’s Lead Foundry, Denied $750 Million Loan
From
the Los Angeles Times today comes news that the United States Export Import Bank has turned down Semiconductor Manufacturing
International Corp. (SMIC) loan application. The loan was valued at $750 million. . Excerpts from the piece indicate that
Micron Technology, the only major DRAM manufacturer left in the United States, had a role in the decision.
The Los Angeles Times indicates that Micron’s position was that the loan should be denied because it increases competition
to the point that United
States semiconductor companies can’t expand manufacturing based employment growth. Micron points to its shuttered factory in Utah,
where the company had planned to hire over 3000 employees. The other argument is that the loan would have improved American
exports - one of the goals of the Export Import bank. SMIC had planned to use the funds to purchase semiconductor equipment
from Applied Materials, a company based in the United States.
The
loan is a potentially explosive political issue. American semiconductor companies over the last ten years have in-sourced,
according to some estimates, hundreds of thousands of foreign H1-B visas into the United States. The semiconductor industry has long complained to the United States
Congress of a shortage of American engineering talent. Because of the alleged lack of talent, these same semiconductor companies
have begun to outsource those same jobs to countries such as India and
China.
This has been to the lament of many foreign nationals in the Silicon Valley –
a valley, which some has characterized as empty of Americans. Some foreign nationals now must consider the hard choice of
selling their Silicon Valley homes and heading back to their native lands to find a secure
job, or staying here and refinancing their homes to stay afloat. American engineers, who have long ago left the chip market
for different industries, on the other hand, seem less concerned. The American
point of view is that jobs that American chip companies create in America
will not go to Americans, but to in-sourced and naïve foreign nationals. Why the disconnect between American engineers, thought
to be some of the most innovative in the world, and semiconductor companies? As
one Taiwan chip executive puts its, all the engineers in the Silicon Valley are Chinese. That Taiwan executive
moved back to Taiwan to start a company.
Although, the H1-B visa limit was let to briefly drop back from its high of 195,000 per year to 65,000, the United States
Congress just approved an increase to 85,000.
FEBRUARY 8TH, 2005
Stacked Wireless Technology May Replace MCP Stacked Chips
The Jiji Press reports
that the University of Hiroshima has developed a new
type of wireless stacked chip. Today’s traditional stacked chips, stack
one die on top of another and then use a vertical interconnects to connect the chip die together. At the University of Hiroshima, the design also stacks
the chips vertically, but instead of a vertical interconnect, the design uses a very small antenna in each chip die to transfer
data. The technology also permits a relatively large number of chips to be stacked,
over 10 compared to about 3 used in today’s MCP stacked chips. The
work was done at the university’s Research Center on Nanodevices and Systems. Professor Atsushi Iwata, who heads the center, was
responsible for the research. In 2004, the center in 2004 also presented a paper on wireless stacked chips at The 2nd Hiroshima International Workshop. That paper
was presented by Professor Takamaro Kikkawa, also of Hiroshima
University.
FEBRUARY 4, 2005
Taiwan’s January Chip Sales Come In Mixed
United Microelectronics
and Powerchip Semiconductor, two heavyweights in Taiwan’s
chip industry reported unaudited results for January 2005. Powerchip reported
revenue of NT$ 5.31 billion for the month, a 71 percent increase over January 2004. Month to month the gain was 5.6 percent.
Powerchip reported that the January gain was a result of a higher average selling price in January compared to December. Powerchip
also announced that it has started mass production at its second 300 mm DRAM wafer fab (Fab 12B). The fab produces DRAMs based
on a 0.11 micron process. The fab is expected to enter mass production in the
first half of 20045.
On the downside, United Microelectronics, a major foundry that numerous fables companies rely on
for production, reported that its January 2005 sales continued on a downward trend. For January 2005, the company reported
revenue of NT$ 7.14 billion, a 13.9 percent drop from last January and a staggering 19.65 percent drop from December 2004
sales. United Microelectronics have fallen since September 2004, when sales peaked
at $NT 11.86 billion. January 2005 revenues in fact were considerable lower than any month in 2004.
FEBRUARY 3, 2005
Heat Convection Material Found to Be 70 Percent More Efficient
Neomax Materials Co, a
semiconductor package material company, according to reports from Asia Pulse has scheduled the production of tons of a new
heat efficient material it has developed. The techniques used to produce the material results in a 70 percent more heat efficient
material than what was obtained in the past. . With applications that range from the hot water heater in the garage to chip
packages in your computer, Neomax is expected to broaden its customer base with the copper based bonding compound. The company
plans to start production in March at around one ton per month and then increase production in the spring of 2006 to 10 tons
per month.
FEBRUARY 3, 2005
Superconductive Power System Saves Wafer Fabs Millions
American Superconductor
reported that an order from a major semiconductor wafer fabrication facility contributed to record revenues at its Power Electronics
Systems business. American’s PQ-IVR system is considered an ideal power source solution for wafer fabs. The company
says that sub-second voltage sags often shut down wafer fabs abruptly, costing millions in terms of lost wafers and productivity. The PQ-IVR system is an energy storage system based on American’s Superconductor
Magnetic Energy Storage (SMES) technology. The magnet has a storage capacity of 3 MJ and occupies only 10 square feet. American expects several more orders for the systems. Altis Semiconductor, a joint
wafer fab facility of IBM Microelectronics and Infineon Technologies, is one of American’s semiconductor companies.
Besides its reliable power
source, American Superconductor also has done well with its high temperature superconductor wire and its supermachines (motors
based on high temperature superconductor technology). For its most recent quarter, ended December 31, 2004, American Superconductor
reports an 89 percent increase in revenue over last year. Revenue increased to $23.2 million for its third quarter from year
ago levels of $12.3 million. Unlike companies in the semiconductor market, which
for the most part have reported sequential declines in revenue, this company has reported a 144 percent sequential quarter
to quarter gain. In its second quarter American Superconductor had sales of $9.5 million.
For its fiscal year, which
ends in March, American Superconductor forecasts revenue to be in the range of $58 million to $61 million. For the nine months
to date, the company has recorded $45.4 million in revenue. American Superconductor
sells its high temperature superconductive wire for electric utility power cable applications. Its supermachines are used
in wind energy farms, ship propulsion and industrial energy generation applications. With the semiconductor industry powering
their fabs with the technology, one has to wonder when superconductive chips or for that matter superconductive micromachines
will be on the market
FEBRUARY 3, 2005
China’s Foundry Reports Solid 100 Percent Growth
Semiconductor Manufacturing
International Corp. (SMIC) announced fourth quarter sales of $291.8 million, a 100.2 percent gain over the same period last
year. The company also bucked the chip foundry trend and reported a 6.2 percent sequential quarterly gain from $274.8 million
in the third quarter. SMIC also reported that its fab utilization rate was in the order of 95 percent, far above the 60 to
70 percent figures reported by other foundries. And that high utilization rate was with an increase in wafer shipments. Wafer
shipments at the company increased to 304,000 from 264,000 over the third quarter of 2004.
So what’s the secret
to success? One is the demand from China’s
growing fables community. Another is a 12 inch fab to meet the demand and another is perhaps price. SMIC reports that its
blended ASP decreased to $917 in the fourth quarter from $991 in the third quarter.
SMIC plans to offer 90 nanometer
technologies this year. In 2004, the company obtained significant revenue from its advanced 0.13 micron technology.
OUTSOURCE AND PROCESS NEWS COLUMN
FEBRUARY 2, 2005
China’s Flash Foundry Capacity Funded
Silicon Storage Technology (SST), encouraged by strong demand for flash technology from mainland China’s fabless and chip design houses through its SST China unit, has reported that
it has signed a licensing agreement with Nanotech Corporation, a foundry based in Changzhou
Hi-Tech region of China. As part of the
agreement Nanotech will license SST’s 0.25 micron flash semiconductor process and serve as SST’s China foundry for flash based products. As part of the agreement,
SST’s subsidiary, SST International has purchased Series B preferred shares of Nanotech Corp. SST China was established
in 2001 to provide memory design services to the China market.
SST is betting on demand for serial flash chips to exceed 500 million units in 2005. Growth will apparently come from optical disk drives, hard
disk drives such as one-inch and smaller versions, LCD monitors, LCD TVs, MP3
players. SST plans to rely on its flash foundry partners: Grace Semiconductor, Seiko Epson and TSMC to meet the demand.
FEBRUARY 1, 2005
Kilopass Enters
Into Non-Volatile Memory Agreement With Tower
Kilopass Technology Inc.
announced that it has entered into an agreement with Tower Semiconductor Ltd, Israel’s primary chip foundry.
The agreement was called a foundry technology agreement.
Kilopass provides secure
non-volatile memory cores. The memory cores security features differ from standard flash memory cores. The contents of Kilopass
XPN memory is considered more secure than flash memory. One of the reasons is that the data in Kilopass’ memory can’t
be read even if the chip is reverse engineered.
FEBRUARY 1, 2005
UMC and AnSoft Place Inductive Touch On RFCMOS Design Flow
Ansoft Corp. announced
along with United Microelectronics Corp (UMC) one of Taiwan’s
top chip foundries, the availability of one of the first parameterized spiral inductor design kits. The design kit links directly
between Ansoft’s RF design software and UMC’s process parameters. The inductor design kit is part of Ansoft and
UMC’s efforts to develop a completely qualified and tested electromagnetic based design flow for radio frequency based
CMOS chips. Such a flow permits the design of new high-growth market chips such as ultra wideband (UWB) radio chips.
FEBRUARY 1, 2005
EV Group Opens MEMS Foundry in Korea
EV Group announced that
it will open the Technology Innovation Center of Sung Kyun Kwan University (SKKU) in Suwon, Korea.
The facility, designated the JML lab is for MEMS, advanced packaging processes and nanoimprint lithography. The facility is expected to also provide MEMS foundry services. The facility has been scheduled to open
in March of 2005 and is to be accompanied with a workshop on nanoimprint lithography and wafer binding processes.
FEBRUARY 1, 2004
Interface A Standard Rallies EDA Industry and Microsoft
The Interface A standard,
a Semiconductor Equipment and Materials International (SEMI) standard for the intense complicated operational information
generated from semiconductor manufacturing facilities has won friends in three industries. OSIsoft Inc. a process manufacturing
industry software company endorsed the standard. Microsoft and Asyst Technology, a semiconductor equipment company, also have
endorsed the standard. OSIsoft has plans to offer to semiconductor manufacturers a real-time software platform that displays,
the Interface A way, critical operational information.
In related Interface A
news, Cimetrix, a factory automation software company catering to the semiconductor and electronics industry, announced that
it has closed the placement of $2 million of common stock. One of Cimetrix's newest products, CIMPortal, is based on SEMI’s
Interface A equipment communications standards. Investors included Tsunami Network Partners Corporation, a company that has
ties in the Japanese high technology market
FEBRUARY 1, 2005
Fujitsu Reduces Chip Packaging Energy Costs 18 Percent
with CO2 Free Design
Fujitsu has stated plans
to use only 100 percent biodegradable plant materials for the manufacture of its embossed carrier tapes used to ship its integrated
circuits. As a result of the change, Fujitsu expects to reduce carbon dioxide (CO2) emissions by 11 percent. The company had previously used polystryrene to make the embossed carrier tape. Fujitsu had previously used biodegradable materials for only 20 percent of its chip products. The plant based tape resin takes an estimated 18 percent less energy to produce than the polystryrene based
tape.
JANUARY 31, 2005
Chartered’s Wafer Shipments Drop 24 Percent
Chartered expects the first
quarter of 2005 to be sequentially down. Utilization rates are expected to remain in the range of 58 percent to 62 percent.
Chartered reported that fourth quarter (2004) wafer shipments were 191.8 thousand wafers (eight-inch equivalent). This is
a 4.4 percent drop from the fourth quarter of 2003 and a 24.0 percent sequential drop from the third quarter of 2004, when
252.4 thousand wafers (eight-inch equivalent) were shipped. Although shipments
dropped 24 percent sequentially, the Average Selling Price (ASP) faired better. The ASP was $994 per wafer in the fourth quarter
2004, which was 2.5 percent below the $1,019 per wafer ASP charged in third quarter 2004.
Wafer utilization levels
have dropped with shipments. For the fourth quarter, 2004, utilization
was 61 percent compared to 89 percent in third quarter 2004. Utilization levels in 2003 were 58 percent.
Chartered forecasts revenues
for the first quarter of 2005 will be near $183 million, or down sequentially from 2 percent to 6 percent.
JANUARY 27th, 2005
Vitesse and Eblana develop Low-Cost Photonic Manufacturing Technology
Expect the cost of photonic components to drop as a result of a manufacturing agreement between
Vitesse Semiconductor and Eblana Photonics. The two companies have reported that they have disruptive technology, which should
permit the companies to reduce the cost of transceiver by as much as 50 percent. The two companies plan to produce the photonic
chips based totally on integrated circuit process technology. As part of the
agreement, Vitesse plans to manufacture single-mode laser diodes on its 4 inch Indium Phosphide (InP) wafer fabrication line.
JANUARY 27th, 2005
300 mm Wafer Capacity Still Requires Large Capital Expenditures
Despite the belief that semiconductor revenues in 2005 will be flat, Taiwan Semiconductor
Manufacturing Company, the largest foundry in the world, still plans to increase its capital expenditures levels to
the $2.5 billion to $2.7 billion range this year. One of the major reasons is
the need to invest in 300 mm wafer fabrication equipment, which is more costly than 200 mm equipment.
STMicroelectronics, which expects to outperform the semiconductor market in 2005, does however
plan to keep costs down. In order to accomplish this and increase sales in the Asia Pacific region, STMicroleectronics will
shift manufacturing from Europe and the United States to the Asia Pacific region. By the end of 2005,
STMicroelectronics is expected to have over 50 percent of its chips manufactured in Asia.
STMicroelectronics is also expected to reduce R&D expenditures in terms of dollars to about $1.5 billion from the $2 billion
it spent in 2004. STMicroelectronics expects R&D spending to remain the same
in terms of percentage of total revenue.
JANUARY 24th, 2005
Innovative Silicon Inc. May Disrupt Memory
and Process Market Shares
Innovative Silicon, based in Switzerland,
announced today that it has taped-out its Z-RAM embedded memory technology for embedded memory applications with a 90 nm process.
The technology may become the next memory standard. This is because Innovative's
memory cell requires one transistor and doesn’t require a capacitor - which results in a major reduction in memory
cell size and memory chip size.
One of the secrets to the technology, according
to the company, is that the design is based on the silicon-on-insulator (SOI) process technology. Specifically, the design takes advantage of a SOI parasitic effect related to the Floating Body or Body
Charging effect. The design uses a circuit to take advantage
of the Floating Body effect to read and write data – instead of a capacitor.
The
impact of the technology may be very great. The area required to implement embedded memory with the SOI capless cell
is about half of traditional designs. Another benefit, according to the company, is that the embedded SOI capless DRAM
process requires less mask steps than the standard embedded DRAM process. This would make embedded DRAM
SoCs as cost-effective as tradtional logic SoC chips. Becasue the process is the SOI process, DRAMs built with
SOI devices result in faster and lower power memory chips than those built with standard processes.
SOI wafer suppliers may
also see gold when they hear the news. The memory chip market is a major segment of the $200 billion IC market. Furthermore,
the SoC market, which requires low-cost, and area optimized embedded memory, is sizable and growing. Add to this IBM’s
and Advanced Micro Devices' SOI plans for their next generation microprocessors - and one might find a genuine SOI shortage.
JANUARY 18th, 2005
AMD
Places Dollars on Table for SOITEC’s SOI
Advanced Micro Devices, in line with plans to use strained silicon
technology for its processors this year, has placed an order with Soitec for an estimated $50 million. The order is for Soitec’s
silicon-on-insulator (SOI) wafers. The 200-mm and 300-mm wafer order is expected to be delivered in 2005.
JANUARY 18th, 2005
Renesas Revamps Package Strategy
Casio Computer Co. agreed to license its wafer level packaging technology
to Renesas Technology Corp. Renesas is one of the world’s largest producers of microcontroller chips.
JANUARY 18th, 2005
ZMD and 1St Silicon Enter into Automotive Foundry Agreement
ZMD AG and 1St Silicon, a chip foundry in Malaysia, entered
into an agreement whereby the two companies will develop and second source chip manufacturing technology used for the development
of high voltage and mixed signal automotive chips. The base process has a feature length of 0.18 micron.
JANUARY 18th, 2005
Silterra Decreases
Process Ramp-Up Time with HPL Technologies Silterra
reported that it used HPL Technologies SRAM yield technology to reduce the development time of is 0.13 micron CMOS process.
The development has led to the production of functional 4 MBit and 8 Mbit SRAMs at Silterra.
JANUARY 14th, 2005
AmberWave Brings Improved Semiconductor Process To Korea
Despite IBM’s and Advanced Micro Devices advancements in strained
silicon technology, AmberWave continues to expand its base of supporters. AmberWave announced that LG Siltron has entered
into a license agreement whereby LG Siltron, a major producer of raw silicon wafers, will obtain rights to AmberWave’s
advanced material intellectual property. This includes AmberWave’s bulk strained silicon, strained silicon-on-insulator
and III-V heteromaterials. Strained silicon has been noted as a way to reduce a chip’s power consumption. Posted Jan
14, 2005.
China’s Star IC Foundry Forecast to Fall!
SMIC, which shipped 263,808
processed wafers in its third quarter of 2004, has doubts about the New
Year. From Reuters comes news that SMIC plans to cut its production output by up to 25 percent. The downturn may only be temporary,
and production increases may resume in March of 2005. Posted Jan 14, 2005.
JANUARY 6th, 2005
Sigmatel’s MP3 Chips Now in Volume Production at UTAC
United
Test and Assembly Centre (UTAC) has reported that Sigmatel’s MP3 audio codec chips are now in volume production. According to past released data, production volume needs from Sigmatel for MP3 chips
could be over 5 million units per quarter. UTAC also provides manufacturing services
for Sigmatel’s other chips and has parts in the qualification stage.
SMIC Begins Construction
of Test and Packaging Plant
Semiconductor Manufacturing
International Corp. has been reported to have begun construction of a test and packaging plant in Chengud China.
The $175 million plant is expected to be in production in about one year. Production
capacity is estimated at 432 million chips per year. The facility is expected to employ 2,500.
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